| /* |
| * Copyright (c) 2018 Yurii Hamann |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/pinctrl/stm32-pinctrl.h> |
| |
| / { |
| soc { |
| pinctrl: pin-controller@40020000 { |
| usart1_pins_a: usart1@0 { |
| rx_tx { |
| rx = <STM32_PIN_PB7 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PB6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart1_pins_b: usart1@1 { |
| rx_tx { |
| rx = <STM32_PIN_PA10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PA9 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart2_pins_a: usart2@0 { |
| rx_tx { |
| rx = <STM32_PIN_PA3 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PA2 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart2_pins_b: usart2@1 { |
| rx_tx { |
| rx = <STM32_PIN_PD6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PD5 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart3_pins_a: usart3@0 { |
| rx_tx { |
| rx = <STM32_PIN_PB11 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PB10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart3_pins_b: usart3@1 { |
| rx_tx { |
| rx = <STM32_PIN_PD9 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PD8 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart3_pins_c: usart3@2 { |
| rx_tx { |
| rx = <STM32_PIN_PC11 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PC10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| uart4_pins_a: uart4@0 { |
| rx_tx { |
| rx = <STM32_PIN_PA1 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PA0 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| uart4_pins_b: uart4@1 { |
| rx_tx { |
| rx = <STM32_PIN_PC11 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PC10 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| uart5_pins_a: uart5@0 { |
| rx_tx { |
| rx = <STM32_PIN_PD2 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PC12 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart6_pins_a: usart6@0 { |
| rx_tx { |
| rx = <STM32_PIN_PC7 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PC6 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| usart6_pins_b: usart6@1 { |
| rx_tx { |
| rx = <STM32_PIN_PG9 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PG14 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| uart7_pins_a: uart7@0 { |
| rx_tx { |
| rx = <STM32_PIN_PE7 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PE8 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| uart7_pins_b: uart7@1 { |
| rx_tx { |
| rx = <STM32_PIN_PF6 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PF7 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| uart8_pins_a: uart8@0 { |
| rx_tx { |
| rx = <STM32_PIN_PE0 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUPDR_NO_PULL)>; |
| tx = <STM32_PIN_PE1 (STM32_PINMUX_ALT_FUNC_8 | STM32_PUSHPULL_NOPULL)>; |
| }; |
| }; |
| }; |
| }; |
| }; |
