| /* |
| * Copyright (c) 2023 Nuvoton Technology Corporation. |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <mem.h> |
| #include "npcx/npcx9.dtsi" |
| |
| / { |
| chosen { |
| zephyr,entropy = &drbg0; |
| }; |
| |
| flash0: flash@10058000 { |
| reg = <0x10058000 DT_SIZE_K(416)>; |
| }; |
| |
| flash1: flash@64000000 { |
| reg = <0x64000000 DT_SIZE_K(1024)>; |
| }; |
| |
| sram0: memory@200c0000 { |
| compatible = "mmio-sram"; |
| reg = <0x200C0000 DT_SIZE_K(92)>; |
| }; |
| |
| /* RAM space used by Booter */ |
| bootloader_ram: memory@200d7000 { |
| compatible = "mmio-sram"; |
| reg = <0x200D7000 DT_SIZE_K(4)>; |
| }; |
| |
| soc { |
| drbg0: drbg@110 { |
| compatible = "nuvoton,npcx-drbg"; |
| reg = <0x110 0x2c 0x15c 0x04>; |
| context-buffer-size = <240>; |
| status = "disabled"; |
| }; |
| }; |
| |
| soc-id { |
| device-id = <0x2b>; |
| }; |
| }; |
| |
| &qspi_fiu0 { |
| int_flash: w25q80@0 { |
| compatible ="nuvoton,npcx-fiu-nor"; |
| size = <DT_SIZE_M(1 * 8)>; |
| reg = <0>; |
| status = "okay"; |
| |
| /* quad spi bus configuration of nor flash device */ |
| qspi-flags = <NPCX_QSPI_SW_CS1>; |
| mapped-addr = <0x64000000>; |
| pinctrl-0 = <&int_flash_sl>; |
| pinctrl-names = "default"; |
| }; |
| }; |
