| # Copyright (c) 2021 Telink Semiconductor |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| config SOC_SERIES_TLSR951X |
| bool |
| select RISCV |
| select RISCV_ISA_RV32I |
| select RISCV_ISA_EXT_M |
| select RISCV_ISA_EXT_A |
| select RISCV_ISA_EXT_C |
| select RISCV_ISA_EXT_ZICSR |
| select RISCV_ISA_EXT_ZIFENCEI |
| select RISCV_PRIVILEGED |
| select RISCV_HAS_PLIC |
| select HAS_TELINK_DRIVERS |
| select ATOMIC_OPERATIONS_BUILTIN |
| select CPU_HAS_FPU |
| select INCLUDE_RESET_VECTOR |
| |
| if SOC_SERIES_TLSR951X |
| |
| config TELINK_B91_HWDSP |
| bool "Support Hardware DSP" |
| select RISCV_SOC_CONTEXT_SAVE |
| |
| config TELINK_B91_PFT_ARCH |
| bool "Support performance throttling" |
| default y |
| select RISCV_SOC_CONTEXT_SAVE |
| |
| endif # SOC_SERIES_TLSR951X |
