| # Copyright (c) 2021 Andes Technology Corporation |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| if SOC_SERIES_ANDES_AE350 |
| |
| rsource "Kconfig.defconfig.ae*" |
| |
| config SYS_CLOCK_HW_CYCLES_PER_SEC |
| default 60000000 |
| |
| config RISCV_GENERIC_TOOLCHAIN |
| default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr" |
| default n |
| |
| config RISCV_SOC_INTERRUPT_INIT |
| default y |
| |
| if RISCV_HAS_PLIC |
| |
| config 2ND_LVL_ISR_TBL_OFFSET |
| default 12 |
| |
| config 2ND_LVL_INTR_00_OFFSET |
| default 11 |
| |
| config 2ND_LVL_INTR_01_OFFSET |
| default 3 |
| |
| config MAX_IRQ_PER_AGGREGATOR |
| default 52 |
| |
| config NUM_2ND_LEVEL_AGGREGATORS |
| default 2 |
| |
| config NUM_IRQS |
| default 116 |
| |
| endif # RISCV_HAS_PLIC |
| |
| if RISCV_HAS_CLIC |
| |
| config NUM_IRQS |
| default 48 |
| |
| config RISCV_MCAUSE_EXCEPTION_MASK |
| default 0xFFF |
| |
| config ARCH_IRQ_VECTOR_TABLE_ALIGN |
| default 512 if RISCV_ISA_RV64I |
| default 256 |
| |
| endif # RISCV_HAS_CLIC |
| |
| choice CACHE_TYPE |
| default EXTERNAL_CACHE |
| endchoice |
| |
| endif # SOC_SERIES_ANDES_AE350 |
