| /* SoC level DTS fixup file */ |
| |
| /* CCM configuration */ |
| #define CONFIG_DCCM_BASE_ADDRESS ARC_DCCM_80000000_BASE_ADDRESS |
| #define CONFIG_DCCM_SIZE (ARC_DCCM_80000000_SIZE >> 10) |
| |
| #define CONFIG_ICCM_BASE_ADDRESS ARC_ICCM_0_BASE_ADDRESS |
| #define CONFIG_ICCM_SIZE (ARC_ICCM_0_SIZE >> 10) |
| |
| /* |
| * UART configuration |
| */ |
| #define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_F0008000_BASE_ADDRESS |
| #define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_F0008000_IRQ_0 |
| #define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_F0008000_CLOCK_FREQUENCY |
| #define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_F0008000_CURRENT_SPEED |
| #define CONFIG_UART_NS16550_PORT_0_NAME NS16550_F0008000_LABEL |
| #define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_F0008000_IRQ_0_PRIORITY |
| |
| #define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_F0009000_BASE_ADDRESS |
| #define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_F0009000_IRQ_0 |
| #define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_F0009000_CLOCK_FREQUENCY |
| #define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_F0009000_CURRENT_SPEED |
| #define CONFIG_UART_NS16550_PORT_1_NAME NS16550_F0009000_LABEL |
| #define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_F0009000_IRQ_0_PRIORITY |
| |
| #define CONFIG_UART_NS16550_PORT_2_BASE_ADDR NS16550_F000A000_BASE_ADDRESS |
| #define CONFIG_UART_NS16550_PORT_2_IRQ NS16550_F000A000_IRQ_0 |
| #define CONFIG_UART_NS16550_PORT_2_CLK_FREQ NS16550_F000A000_CLOCK_FREQUENCY |
| #define CONFIG_UART_NS16550_PORT_2_BAUD_RATE NS16550_F000A000_CURRENT_SPEED |
| #define CONFIG_UART_NS16550_PORT_2_NAME NS16550_F000A000_LABEL |
| #define CONFIG_UART_NS16550_PORT_2_IRQ_PRI NS16550_F000A000_IRQ_0_PRIORITY |
| |
| /* |
| * I2C configuration |
| */ |
| /* I2C_0 is on Pmod2 connector */ |
| #define CONFIG_I2C_0_BASE_ADDR SNPS_DESIGNWARE_I2C_F0004000_BASE_ADDRESS |
| #define CONFIG_I2C_0_BITRATE SNPS_DESIGNWARE_I2C_F0004000_CLOCK_FREQUENCY |
| #define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_F0004000_IRQ_0 |
| #define CONFIG_I2C_0_IRQ_PRI SNPS_DESIGNWARE_I2C_F0004000_IRQ_0_PRIORITY |
| #define CONFIG_I2C_0_NAME SNPS_DESIGNWARE_I2C_F0004000_LABEL |
| #define CONFIG_I2C_0_IRQ_FLAGS 0 |
| |
| /* I2C_1 is on Pmod4 connector */ |
| #define CONFIG_I2C_1_BASE_ADDR SNPS_DESIGNWARE_I2C_F0005000_BASE_ADDRESS |
| #define CONFIG_I2C_1_BITRATE SNPS_DESIGNWARE_I2C_F0005000_CLOCK_FREQUENCY |
| #define CONFIG_I2C_1_IRQ SNPS_DESIGNWARE_I2C_F0005000_IRQ_0 |
| #define CONFIG_I2C_1_IRQ_PRI SNPS_DESIGNWARE_I2C_F0005000_IRQ_0_PRIORITY |
| #define CONFIG_I2C_1_NAME SNPS_DESIGNWARE_I2C_F0005000_LABEL |
| #define CONFIG_I2C_1_IRQ_FLAGS 0 |
| |
| |
| /* |
| * GPIO configuration |
| */ |
| #define GPIO_DW_0_BASE_ADDR SNPS_DESIGNWARE_GPIO_F0002000_BASE_ADDRESS |
| #define GPIO_DW_0_BITS SNPS_DESIGNWARE_GPIO_F0002000_BITS |
| #define CONFIG_GPIO_DW_0_NAME SNPS_DESIGNWARE_GPIO_F0002000_LABEL |
| #define GPIO_DW_0_IRQ SNPS_DESIGNWARE_GPIO_F0002000_IRQ_0 |
| #define CONFIG_GPIO_DW_0_IRQ_PRI SNPS_DESIGNWARE_GPIO_F0002000_IRQ_0_PRIORITY |
| #define GPIO_DW_0_IRQ_FLAGS 0 |
| |
| #define GPIO_DW_1_BASE_ADDR SNPS_DESIGNWARE_GPIO_F000200C_BASE_ADDRESS |
| #define GPIO_DW_1_BITS SNPS_DESIGNWARE_GPIO_F000200C_BITS |
| #define CONFIG_GPIO_DW_1_NAME SNPS_DESIGNWARE_GPIO_F000200C_LABEL |
| #define GPIO_DW_1_IRQ SNPS_DESIGNWARE_GPIO_F000200C_IRQ_0 |
| #define CONFIG_GPIO_DW_1_IRQ_PRI SNPS_DESIGNWARE_GPIO_F000200C_IRQ_0_PRIORITY |
| |
| #define GPIO_DW_2_BASE_ADDR SNPS_DESIGNWARE_GPIO_F0002018_BASE_ADDRESS |
| #define GPIO_DW_2_BITS SNPS_DESIGNWARE_GPIO_F0002018_BITS |
| #define CONFIG_GPIO_DW_2_NAME SNPS_DESIGNWARE_GPIO_F0002018_LABEL |
| #define GPIO_DW_2_IRQ SNPS_DESIGNWARE_GPIO_F0002018_IRQ_0 |
| #define CONFIG_GPIO_DW_2_IRQ_PRI SNPS_DESIGNWARE_GPIO_F0002018_IRQ_0_PRIORITY |
| |
| #define GPIO_DW_3_BASE_ADDR SNPS_DESIGNWARE_GPIO_F0002024_BASE_ADDRESS |
| #define GPIO_DW_3_BITS SNPS_DESIGNWARE_GPIO_F0002024_BITS |
| #define CONFIG_GPIO_DW_3_NAME SNPS_DESIGNWARE_GPIO_F0002024_LABEL |
| #define GPIO_DW_3_IRQ SNPS_DESIGNWARE_GPIO_F0002024_IRQ_0 |
| #define CONFIG_GPIO_DW_3_IRQ_PRI SNPS_DESIGNWARE_GPIO_F0002024_IRQ_0_PRIORITY |
| |
| /* |
| * SPI configuration |
| */ |
| #define SPI_DW_PORT_0_REGS SNPS_DESIGNWARE_SPI_F0006000_BASE_ADDRESS |
| #define SPI_DW_PORT_0_IRQ SNPS_DESIGNWARE_SPI_F0006000_IRQ_0 |
| #define CONFIG_SPI_0_NAME SNPS_DESIGNWARE_SPI_F0006000_LABEL |
| #define CONFIG_SPI_0_IRQ_PRI SNPS_DESIGNWARE_SPI_F0006000_IRQ_0_PRIORITY |
| |
| |
| #define SPI_DW_PORT_1_REGS SNPS_DESIGNWARE_SPI_F0007000_BASE_ADDRESS |
| #define SPI_DW_PORT_1_IRQ SNPS_DESIGNWARE_SPI_F0007000_IRQ_0 |
| #define CONFIG_SPI_1_NAME SNPS_DESIGNWARE_SPI_F0007000_LABEL |
| #define CONFIG_SPI_1_IRQ_PRI SNPS_DESIGNWARE_SPI_F0007000_IRQ_0_PRIORITY |
| |
| #define SPI_DW_IRQ_FLAGS 0 |
| |
| #define SPI_DW_SPI_CLOCK NS16550_F0009000_CLOCK_FREQUENCY |
| |
| |
| /* End of SoC Level DTS fixup file */ |
