| /* |
| * Copyright (c) 2024 STMicroelectronics |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /** |
| * @file |
| * @brief System/hardware module for STM32H7RS CM7 processor |
| */ |
| |
| #include <zephyr/kernel.h> |
| #include <zephyr/device.h> |
| #include <zephyr/init.h> |
| #include <zephyr/cache.h> |
| #include <soc.h> |
| #include <stm32_ll_bus.h> |
| #include <stm32_ll_pwr.h> |
| #include <stm32_ll_rcc.h> |
| |
| #include <cmsis_core.h> |
| |
| |
| /** |
| * @brief Perform basic hardware initialization at boot. |
| * |
| * This needs to be run from the very beginning. |
| */ |
| void soc_early_init_hook(void) |
| { |
| sys_cache_instr_enable(); |
| sys_cache_data_enable(); |
| |
| /* Update CMSIS SystemCoreClock variable (HCLK) */ |
| /* At reset, system core clock is set to 64 MHz from HSI */ |
| SystemCoreClock = 64000000; |
| |
| /* Power Configuration */ |
| #if !defined(SMPS) && \ |
| (defined(CONFIG_POWER_SUPPLY_DIRECT_SMPS) || \ |
| defined(CONFIG_POWER_SUPPLY_SMPS_1V8_SUPPLIES_LDO) || \ |
| defined(CONFIG_POWER_SUPPLY_SMPS_2V5_SUPPLIES_LDO) || \ |
| defined(CONFIG_POWER_SUPPLY_SMPS_1V8_SUPPLIES_EXT_AND_LDO) || \ |
| defined(CONFIG_POWER_SUPPLY_SMPS_2V5_SUPPLIES_EXT_AND_LDO) || \ |
| defined(CONFIG_POWER_SUPPLY_SMPS_1V8_SUPPLIES_EXT) || \ |
| defined(CONFIG_POWER_SUPPLY_SMPS_2V5_SUPPLIES_EXT)) |
| #error Unsupported configuration: Selected SoC do not support SMPS |
| #endif |
| #if defined(CONFIG_POWER_SUPPLY_DIRECT_SMPS) |
| LL_PWR_ConfigSupply(LL_PWR_DIRECT_SMPS_SUPPLY); |
| #elif defined(CONFIG_POWER_SUPPLY_SMPS_1V8_SUPPLIES_LDO) |
| LL_PWR_ConfigSupply(LL_PWR_SMPS_1V8_SUPPLIES_LDO); |
| #elif defined(CONFIG_POWER_SUPPLY_SMPS_2V5_SUPPLIES_LDO) |
| LL_PWR_ConfigSupply(LL_PWR_SMPS_2V5_SUPPLIES_LDO); |
| #elif defined(CONFIG_POWER_SUPPLY_SMPS_1V8_SUPPLIES_EXT_AND_LDO) |
| LL_PWR_ConfigSupply(LL_PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO); |
| #elif defined(CONFIG_POWER_SUPPLY_SMPS_2V5_SUPPLIES_EXT_AND_LDO) |
| LL_PWR_ConfigSupply(LL_PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO); |
| #elif defined(CONFIG_POWER_SUPPLY_SMPS_1V8_SUPPLIES_EXT) |
| LL_PWR_ConfigSupply(LL_PWR_SMPS_1V8_SUPPLIES_EXT); |
| #elif defined(CONFIG_POWER_SUPPLY_SMPS_2V5_SUPPLIES_EXT) |
| LL_PWR_ConfigSupply(LL_PWR_SMPS_2V5_SUPPLIES_EXT); |
| #elif defined(CONFIG_POWER_SUPPLY_EXTERNAL_SOURCE) |
| LL_PWR_ConfigSupply(LL_PWR_EXTERNAL_SOURCE_SUPPLY); |
| #else |
| LL_PWR_ConfigSupply(LL_PWR_LDO_SUPPLY); |
| #endif |
| LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); |
| while (LL_PWR_IsActiveFlag_VOSRDY() == 0) { |
| } |
| |
| #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpioo), okay) || DT_NODE_HAS_STATUS(DT_NODELABEL(gpiop), okay) |
| LL_PWR_EnableXSPIM1(); /* Required for powering GPIO O and P */ |
| #endif /* gpioo || gpio p */ |
| #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpion), okay) |
| LL_PWR_EnableXSPIM2(); /* Required for powering GPIO N */ |
| #endif /* gpio n */ |
| #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpiom), okay) |
| LL_PWR_EnableUSBVoltageDetector(); /* Required for powering GPIO M */ |
| #endif /* gpiom */ |
| } |