| # Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| config SOC_ESP32C3 |
| bool "ESP32C3" |
| select RISCV |
| select RISCV_GP |
| select DYNAMIC_INTERRUPTS |
| select CLOCK_CONTROL |
| select PINCTRL |
| select XIP if !MCUBOOT |
| select HAS_ESPRESSIF_HAL |
| select RISCV_ISA_RV32I |
| select RISCV_ISA_EXT_M |
| select RISCV_ISA_EXT_C |
| select RISCV_ISA_EXT_ZICSR |
| |
| if SOC_ESP32C3 |
| |
| config SOC_FAMILY_ESP32 |
| bool |
| default y |
| |
| config IDF_TARGET_ESP32C3 |
| bool "ESP32C3 as target board" |
| default y |
| |
| config ESPTOOLPY_FLASHFREQ_80M |
| bool |
| default y |
| |
| config FLASH_SIZE |
| int |
| default $(dt_node_reg_size_int,/soc/flash-controller@60002000/flash@0,0) |
| |
| config FLASH_BASE_ADDRESS |
| hex |
| default $(dt_node_reg_addr_hex,/soc/flash-controller@60002000/flash@0) |
| |
| config ESP_SYSTEM_RTC_EXT_XTAL |
| bool |
| |
| config ESP_SYSTEM_RTC_EXT_OSC |
| bool |
| |
| choice ESP32C3_RTC_CLK_SRC |
| prompt "RTC clock source" |
| default ESP32C3_RTC_CLK_SRC_INT_RC |
| help |
| Choose which clock is used as RTC clock source. |
| |
| config ESP32C3_RTC_CLK_SRC_INT_RC |
| bool "Internal 150kHz RC oscillator" |
| |
| config ESP32C3_RTC_CLK_SRC_EXT_CRYS |
| bool "External 32kHz crystal" |
| select ESP_SYSTEM_RTC_EXT_XTAL |
| |
| config ESP32C3_RTC_CLK_SRC_EXT_OSC |
| bool "External 32kHz oscillator at 32K_XP pin" |
| select ESP_SYSTEM_RTC_EXT_OSC |
| |
| config ESP32C3_RTC_CLK_SRC_INT_8MD256 |
| bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" |
| |
| endchoice |
| |
| config ESP32C3_RTC_CLK_CAL_CYCLES |
| int "Number of cycles for RTC_SLOW_CLK calibration" |
| default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256 |
| default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC |
| range 0 27000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256 |
| range 0 32766 if ESP32C3_RTC_CLK_SRC_INT_RC |
| help |
| When the startup code initializes RTC_SLOW_CLK, it can perform |
| calibration by comparing the RTC_SLOW_CLK frequency with main XTAL |
| frequency. This option sets the number of RTC_SLOW_CLK cycles measured |
| by the calibration routine. Higher numbers increase calibration |
| precision, which may be important for applications which spend a lot of |
| time in deep sleep. Lower numbers reduce startup time. |
| |
| When this option is set to 0, clock calibration will not be performed at |
| startup, and approximate clock frequencies will be assumed: |
| |
| - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024. |
| - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. |
| In case more value will help improve the definition of the launch of the crystal. |
| If the crystal could not start, it will be switched to internal RC. |
| |
| config ESP32_PHY_MAX_WIFI_TX_POWER |
| int "Max WiFi TX power (dBm)" |
| range 10 20 |
| default 20 |
| help |
| Set maximum transmit power for WiFi radio. Actual transmit power for high |
| data rates may be lower than this setting. |
| |
| config ESP32_PHY_MAX_TX_POWER |
| int |
| default ESP32_PHY_MAX_WIFI_TX_POWER |
| |
| config MAC_BB_PD |
| bool "Power down MAC and baseband of Wi-Fi and Bluetooth when PHY is disabled" |
| depends on SOC_ESP32C3 && TICKLESS_KERNEL |
| default n |
| help |
| If enabled, the MAC and baseband of Wi-Fi and Bluetooth will be powered |
| down when PHY is disabled. Enabling this setting reduces power consumption |
| by a small amount but increases RAM use by approximately 4 KB(Wi-Fi only), |
| 2 KB(Bluetooth only) or 5.3 KB(Wi-Fi + Bluetooth). |
| |
| endif |