/* | |
* Copyright (c) 2021 NXP | |
* | |
* SPDX-License-Identifier: Apache-2.0 | |
*/ | |
#include <xtensa/xtensa.dtsi> | |
#include <mem.h> | |
/ { | |
cpus { | |
#address-cells = <1>; | |
#size-cells = <0>; | |
cpu0: cpu@0 { | |
device_type = "cpu"; | |
compatible = "cdns,tensilica-xtensa-lx6"; | |
reg = <0>; | |
}; | |
}; | |
sram0: memory@92400000 { | |
device_type = "memory"; | |
compatible = "mmio-sram"; | |
reg = <0x92400000 DT_SIZE_K(512)>; | |
}; | |
sram1: memory@92c00000 { | |
device_type = "memory"; | |
compatible = "mmio-sram"; | |
reg = <0x92c00000 DT_SIZE_K(512)>; | |
}; | |
}; |