| # Copyright (c) 2021 Telink Semiconductor | |
| # SPDX-License-Identifier: Apache-2.0 | |
| CONFIG_SOC_SERIES_RISCV_TELINK_B91=y | |
| CONFIG_SOC_RISCV_TELINK_B91=y | |
| CONFIG_BOARD_TLSR9518ADK80D=y | |
| CONFIG_GPIO=y | |
| CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000 | |
| CONFIG_HEAP_MEM_POOL_SIZE=4096 | |
| CONFIG_UART_INTERRUPT_DRIVEN=y | |
| CONFIG_SERIAL=y | |
| CONFIG_CONSOLE=y | |
| CONFIG_UART_CONSOLE=y | |
| # HW DSP options | |
| CONFIG_TELINK_B91_HWDSP=n |