dts/arc/quark_se_c1000_ss.dtsi

#include "skeleton.dtsi"

#define __SIZE_K(x) (x * 1024)

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "snps,arcem4";
			reg = <1>;
		};

		core_intc: arcv2-intc@0 {
			compatible = "snps,arcv2-intc";
			interrupt-controller;
			#interrupt-cells = <2>;
		};
	};

	flash0: flash@DT_FLASH_ADDR {
		reg = <DT_FLASH_ADDR DT_FLASH_SIZE>;
	};

	sram0: memory@a8000400 {
		device_type = "memory";
		compatible = "mmio-sram";
		reg = <0xa8000400 DT_SRAM_SIZE>;
	};

	dccm0: dccm@80000000 {
		device_type = "memory";
		compatible = "arc,dccm";
		reg = <0x80000000 DT_DCCM_SIZE>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges;

		uart0: uart@b0002000 {
			compatible = "intel,qmsi-uart";
			reg = <0xb0002000 0x400>;
			interrupts = <5 0>;
			interrupt-parent = <&core_intc>;
			label = "UART_0";

			status = "disabled";
		};

		uart1: uart@b0002400 {
			compatible = "intel,qmsi-uart";
			reg = <0xb0002400 0x400>;
			interrupts = <6 0>;
			interrupt-parent = <&core_intc>;
			label = "UART_1";

			status = "disabled";
		};
	};
};