blob: 82d0e7304a6201b5efc56b620690ceddcd14fc0f [file] [log] [blame]
/*
* Copyright (c) 2017 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/f4/stm32f407Xg.dtsi>
#include <st/f4/stm32f407v(e-g)tx-pinctrl.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "STMicroelectronics STM32F4DISCOVERY board";
compatible = "st,stm32f4discovery";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,canbus = &can2;
};
leds {
compatible = "gpio-leds";
orange_led_3: led_3 {
gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>;
label = "User LD3";
};
green_led_4: led_4 {
gpios = <&gpiod 12 GPIO_ACTIVE_HIGH>;
label = "User LD4";
};
red_led_5: led_5 {
gpios = <&gpiod 14 GPIO_ACTIVE_HIGH>;
label = "User LD5";
};
blue_led_6: led_6 {
gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
label = "User LD6";
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button {
label = "Key";
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
zephyr,code = <INPUT_KEY_0>;
};
};
pwmleds: pwmleds {
compatible = "pwm-leds";
orange_pwm_led: orange_pwm_led {
pwms = <&pwm4 2 PWM_USEC(100) PWM_POLARITY_NORMAL>;
};
green_pwm_led: green_pwm_led {
pwms = <&pwm4 1 PWM_USEC(100) PWM_POLARITY_NORMAL>;
};
red_pwm_led: red_pwm_led {
pwms = <&pwm4 3 PWM_USEC(100) PWM_POLARITY_NORMAL>;
};
blue_pwm_led: blue_pwm_led {
pwms = <&pwm4 4 PWM_USEC(100) PWM_POLARITY_NORMAL>;
};
};
aliases {
led0 = &green_led_4;
led1 = &orange_led_3;
led2 = &red_led_5;
led3 = &blue_led_6;
sw0 = &user_button;
die-temp0 = &die_temp;
volt-sensor0 = &vref;
volt-sensor1 = &vbat;
};
};
&clk_lsi {
status = "okay";
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
div-m = <8>;
mul-n = <336>;
div-p = <2>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(168)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};
&usart2 {
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
};
&timers2 {
status = "okay";
pwm2: pwm {
status = "okay";
pinctrl-0 = <&tim2_ch1_pa0>;
pinctrl-names = "default";
};
};
&timers4 {
status = "okay";
pwm4: pwm {
status = "okay";
pinctrl-0 = <&tim4_ch1_pd12 &tim4_ch2_pd13 &tim4_ch3_pd14 &tim4_ch4_pd15>;
pinctrl-names = "default";
};
};
&rtc {
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
<&rcc STM32_SRC_LSI RTC_SEL(2)>;
status = "okay";
backup_regs {
status = "okay";
};
};
zephyr_udc0: &usbotg_fs {
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
status = "okay";
};
&can2 {
pinctrl-0 = <&can2_rx_pb5 &can2_tx_pb13>;
pinctrl-names = "default";
status = "okay";
};
&adc1 {
pinctrl-0 = <&adc1_in1_pa1 &adc1_in6_pa6>;
pinctrl-names = "default";
st,adc-prescaler = <2>;
status = "okay";
};
&die_temp {
status = "okay";
};
&vref {
status = "okay";
};
&vbat {
status = "okay";
};
&dma1 {
status = "okay";
};
&plli2s {
/* Minimize audio clock error (with i2s mck-enabled) for all of:
* - 22.05kHz / 16b, 24b or 32b
* - 44.1kHz / 16b, 24b or 32b
* - 88.2kHz / 16b or 24b
* Note: because the PLLI2S is dependent on the main PLL, the latter
* should not be changed without checking impact on PLLI2S
*/
mul-n = <271>;
div-r = <2>;
status = "okay";
};
&i2s3 {
mck-enabled;
pinctrl-0 = <&i2s3_ws_pa4 &i2s3_ck_pc10 &i2s3_sd_pc12 &i2s3_mck_pc7>;
pinctrl-names = "default";
clocks = <&rcc STM32_CLOCK(APB1, 15U)>,
<&rcc STM32_SRC_PLLI2S_R I2S_SEL(0)>;
status = "okay";
};
&i2c1 {
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";
audio_codec: cs43l22@4a {
compatible = "cirrus,cs43l22";
reg = <0x4a>;
reset-gpios = <&gpiod 4 0>;
};
};