| # Copyright 2025 NXP |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| if SOC_MIMX94398_A55 |
| |
| # Workaround for not being able to have commas in macro arguments |
| DT_CHOSEN_Z_FLASH := zephyr,flash |
| |
| config FLASH_SIZE |
| default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) |
| |
| config FLASH_BASE_ADDRESS |
| default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) |
| |
| # Enable GIC Safe Configuration to run multiple OSes on Cortex-A Cores |
| config GIC_SAFE_CONFIG |
| default y |
| |
| # Disable data cache until MMU is enabled when booting from EL2 |
| config ARM64_DCACHE_ALL_OPS |
| default y |
| |
| config ARM64_BOOT_DISABLE_DCACHE |
| default y |
| |
| config MCUX_CORE_SUFFIX |
| default "_ca55" if SOC_MIMX94398_A55 |
| |
| config NUM_IRQS |
| default 320 |
| |
| config SYS_CLOCK_HW_CYCLES_PER_SEC |
| default 24000000 |
| |
| endif |
