| # Copyright (c) 2021 Andes Technology Corporation |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| if SOC_SERIES_RISCV_ANDES_V5 |
| |
| # Kconfig picks the first default with a satisfied condition. |
| # SoC defaults should be parsed before SoC Series defaults, because SoCs usually |
| # overrides SoC Series values. |
| source "soc/riscv/riscv-privilege/andes_v5/Kconfig.defconfig.ae*" |
| |
| config SOC_SERIES |
| default "andes_v5" |
| |
| config SYS_CLOCK_HW_CYCLES_PER_SEC |
| default 60000000 |
| |
| config KERNEL_ENTRY |
| default "entry" |
| |
| config RISCV_GENERIC_TOOLCHAIN |
| default y if "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "zephyr" |
| default n |
| |
| config RISCV_SOC_INTERRUPT_INIT |
| default y |
| |
| config RISCV_HAS_CPU_IDLE |
| default y |
| |
| config RISCV_HAS_PLIC |
| default y |
| |
| config RISCV_GP |
| default y |
| |
| config 2ND_LVL_ISR_TBL_OFFSET |
| default 12 |
| |
| config 2ND_LVL_INTR_00_OFFSET |
| default 11 |
| |
| config MAX_IRQ_PER_AGGREGATOR |
| default 52 |
| |
| config NUM_IRQS |
| default 64 |
| |
| endif # SOC_SERIES_RISCV_ANDES_V5 |