| # | |
| # Copyright 2023, NXP | |
| # | |
| # SPDX-License-Identifier: Apache-2.0 | |
| # | |
| # Use external framebuffer memory | |
| CONFIG_MCUX_DCNANO_LCDIF_EXTERNAL_FB_MEM=y | |
| CONFIG_LV_Z_VBD_CUSTOM_SECTION=y | |
| # Use FlexSPI2 for framebuffer (pSRAM is present on this bus) | |
| CONFIG_MCUX_DCNANO_LCDIF_EXTERNAL_FB_ADDR=0x38400000 | |
| # M33 core and LCDIF both access FlexSPI2 through the same cache, | |
| # so coherency does not need to be managed. | |
| CONFIG_MCUX_DCNANO_LCDIF_MAINTAIN_CACHE=n |