| common: |
| timeout: 5 |
| tags: clock_control |
| |
| tests: |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_pll_csi_100: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_csi_100.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_pll_csi_240: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_csi_240.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_pll_hsi_240: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hsi_240.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_pll_hse25_100: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse25_100.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_pll_hse25_240: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse25_240.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_csi4: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/csi4.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.sysclksrc_hse_25: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/hse25.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.pll_csi_ahb_2_100: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_csi_ahb_2_100.overlay" |
| platform_allow: stm32h573i_dk |
| drivers.clock.stm32_clock_configuration.h5.pll_hse25_ahb_2_100: |
| extra_args: DTC_OVERLAY_FILE="boards/clear_clocks.overlay;boards/pll_hse25_ahb_2_100.overlay" |
| platform_allow: stm32h573i_dk |
