| /* |
| * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd. |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| #include <mem.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu0: cpu@0 { |
| device_type = "cpu"; |
| compatible = "cdns,tensilica-xtensa-lx7"; |
| reg = <0>; |
| }; |
| }; |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges; |
| |
| sram0: memory@3ffb0000 { |
| compatible = "mmio-sram"; |
| reg = <0x3ffb0000 0x50000>; |
| }; |
| |
| intc: interrupt-controller@3f4c2000 { |
| #interrupt-cells = <1>; |
| compatible = "espressif,esp32-intc"; |
| interrupt-controller; |
| reg = <0x3f4c2000 0x114>; |
| label = "INTC_0"; |
| status = "okay"; |
| }; |
| |
| uart0: uart@3f400000 { |
| compatible = "espressif,esp32s2-uart"; |
| reg = <0x3f400000 0x400>; |
| label = "UART_0"; |
| status = "disabled"; |
| }; |
| |
| pinmux: pinmux@3f409000 { |
| compatible = "espressif,esp32-pinmux"; |
| reg = <0x3f409000 0x94>; |
| }; |
| |
| gpio0: gpio@3f404000 { |
| compatible = "espressif,esp32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x3f404000 0x800>; |
| interrupts = <GPIO_INTR_SOURCE>; |
| interrupt-parent = <&intc>; |
| label = "GPIO_0"; |
| ngpios = <32>; /* 0..31 */ |
| }; |
| |
| gpio1: gpio@3f404800 { |
| compatible = "espressif,esp32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x3f404800 0x800>; |
| interrupts = <GPIO_INTR_SOURCE>; |
| interrupt-parent = <&intc>; |
| label = "GPIO_1"; |
| ngpios = <22>; /* 32..53 */ |
| }; |
| }; |
| |
| }; |