| /* |
| * Copyright (c) 2017-2019 Intel Corporation. |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include "skeleton.dtsi" |
| #include <dt-bindings/interrupt-controller/intel-ioapic.h> |
| #include <dt-bindings/i2c/i2c.h> |
| #include <dt-bindings/pcie/pcie.h> |
| |
| / { |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "apollo_lake"; |
| reg = <0>; |
| }; |
| |
| }; |
| |
| sram0: memory@100000 { |
| device_type = "memory"; |
| compatible = "mmio-sram"; |
| reg = <0x00100000 DT_SRAM_SIZE>; |
| }; |
| |
| intc: ioapic@fec00000 { |
| compatible = "intel,ioapic"; |
| reg = <0xfec00000 0x1000>; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| }; |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges; |
| |
| uart0: uart@0 { |
| compatible = "ns16550"; |
| |
| pcie; |
| reg = <PCIE_BDF(0,0x18,0) PCIE_ID(0x8086,0x5abc)>; |
| |
| label = "UART_0"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| uart1: uart@1 { |
| compatible = "ns16550"; |
| |
| pcie; |
| reg = <PCIE_BDF(0,0x18,1) PCIE_ID(0x8086,0x5abe)>; |
| |
| label = "UART_1"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| uart2: uart@2 { |
| compatible = "ns16550"; |
| |
| pcie; |
| reg = <PCIE_BDF(0,0x18,2) PCIE_ID(0x8086,0x5ac0)>; |
| |
| label = "UART_2"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| uart3: uart@3 { |
| compatible = "ns16550"; |
| |
| pcie; |
| reg = <PCIE_BDF(0,0x18,3) PCIE_ID(0x8086,0x5aee)>; |
| |
| label = "UART_3"; |
| clock-frequency = <1843200>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| current-speed = <115200>; |
| }; |
| |
| i2c0: i2c@0 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x16,0) PCIE_ID(0x8086,0x5aac)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_0"; |
| |
| status = "okay"; |
| }; |
| |
| i2c1: i2c@1 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x16,1) PCIE_ID(0x8086,0x5aae)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_1"; |
| |
| status = "okay"; |
| }; |
| |
| i2c2: i2c@2 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x16,2) PCIE_ID(0x8086,0x5ab0)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_2"; |
| |
| status = "okay"; |
| }; |
| |
| i2c3: i2c@3 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x16,3) PCIE_ID(0x8086,0x5ab2)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_3"; |
| |
| status = "okay"; |
| }; |
| |
| i2c4: i2c@4 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x17,0) PCIE_ID(0x8086,0x5ab4)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_4"; |
| |
| status = "okay"; |
| }; |
| |
| i2c5: i2c@5 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x17,1) PCIE_ID(0x8086,0x5ab6)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_5"; |
| |
| status = "okay"; |
| }; |
| |
| i2c6: i2c@6 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x17,2) PCIE_ID(0x8086,0x5ab8)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_6"; |
| |
| status = "okay"; |
| }; |
| |
| i2c7: i2c@7 { |
| compatible = "snps,designware-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| pcie; |
| reg = <PCIE_BDF(0,0x17,3) PCIE_ID(0x8086,0x5aba)>; |
| interrupts = <PCIE_IRQ_DETECT IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| label = "I2C_7"; |
| |
| status = "okay"; |
| }; |
| |
| gpio: gpio@d0c50000 { |
| compatible = "intel,apl-gpio"; |
| reg = <0xd0c50000 0x1000>, |
| <0xd0c40000 0x1000>, |
| <0xd0c70000 0x1000>, |
| <0xd0c00000 0x1000>; |
| interrupts = <14 IRQ_TYPE_LEVEL_LOW 3>; |
| interrupt-parent = <&intc>; |
| |
| label = "APL_GPIO"; |
| gpio-controller ; |
| #gpio-cells = <2>; |
| |
| status = "okay"; |
| }; |
| |
| hpet: hpet@fed00000 { |
| label = "HPET"; |
| compatible = "intel,hpet"; |
| reg = <0xfed00000 0x400>; |
| interrupts = <2 IRQ_TYPE_EDGE_RISING 4>; |
| interrupt-parent = <&intc>; |
| |
| status = "okay"; |
| }; |
| }; |
| }; |
