boards/st/stm32f7508_dk/stm32f7508_dk.dts

/*
 * Copyright (c) 2018 Yurii Hamann
 * Copyright (c) 2022, Rtone.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <st/f7/stm32f750X8.dtsi>
#include <st/f7/stm32f750n8hx-pinctrl.dtsi>
#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
#include "arduino_r3_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	model = "STMicroelectronics STM32F7508-DK";
	compatible = "st,stm32f7508_dk";

	chosen {
		zephyr,console = &usart1;
		zephyr,shell-uart = &usart1;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,dtcm = &dtcm;
		zephyr,flash-controller = &n25q128a1;
		zephyr,display = &ltdc;
	};

	leds {
		compatible = "gpio-leds";
		green_led_1: led_1 {
			gpios = <&gpioi 1 GPIO_ACTIVE_HIGH>;
			label = "User LD1";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		user_button: button {
			label = "User";
			gpios = <&gpioi 11 GPIO_ACTIVE_HIGH>;
			zephyr,code = <INPUT_KEY_0>;
		};
	};

	lvgl_pointer {
		compatible = "zephyr,lvgl-pointer-input";
		input = <&ft5336>;
	};

	sdram1: sdram@c0000000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		device_type = "memory";
		reg = <0xc0000000 DT_SIZE_M(16)>;
		zephyr,memory-region = "SDRAM1";
		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
	};

	aliases {
		led0 = &green_led_1;
		sw0 = &user_button;
		spi-flash0 = &n25q128a1;
	};
};

&clk_lsi {
	status = "okay";
};

&clk_hse {
	clock-frequency = <DT_FREQ_M(25)>;
	status = "okay";
};

&pll {
	div-m = <25>;
	mul-n = <432>;
	div-p = <2>;
	div-q = <9>;
	clocks = <&clk_hse>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(216)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <4>;
	apb2-prescaler = <2>;
};

&i2c1 {
	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;
};

&i2c3 {
	pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
	pinctrl-names = "default";
	status = "okay";
	clock-frequency = <I2C_BITRATE_FAST>;

	ft5336: ft5336@38 {
		compatible = "focaltech,ft5336";
		reg = <0x38>;
		int-gpios = <&gpioi 13 0>;
	};
};

&spi2 {
	pinctrl-0 = <&spi2_sck_pi1 &spi2_miso_pb14 &spi2_mosi_pb15>;
	pinctrl-names = "default";
	cs-gpios = <&gpioa 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
	status = "okay";
};

&usart1 {
	pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&usart6 {
	pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

zephyr_udc0: &usbotg_fs {
	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
	pinctrl-names = "default";
	status = "okay";
};

&timers3 {
	st,prescaler = <10000>;
	status = "okay";

	pwm3: pwm {
		status = "okay";
		pinctrl-0 = <&tim3_ch1_pb4>;
		pinctrl-names = "default";
	};
};

&rtc {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
	status = "okay";
};

&sdmmc1 {
	status = "okay";
	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
		     &sdmmc1_d2_pc10 &sdmmc1_d3_pc11
		     &sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
	pinctrl-names = "default";
	cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
};

&mac {
	status = "okay";
	pinctrl-0 = <&eth_mdc_pc1
		     &eth_rxd0_pc4
		     &eth_rxd1_pc5
		     &eth_ref_clk_pa1
		     &eth_mdio_pa2
		     &eth_crs_dv_pa7
		     &eth_tx_en_pg11
		     &eth_txd0_pg13
		     &eth_txd1_pg14>;
	pinctrl-names = "default";
};

&quadspi {
	pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
		     &quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
		     &quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
	pinctrl-names = "default";
	status = "okay";

	n25q128a1: qspi-nor-flash@90000000 {
		compatible = "st,stm32-qspi-nor";
		reg = <0x90000000 DT_SIZE_M(16)>; /* 128 Mbits */
		qspi-max-frequency = <72000000>;
		status = "okay";

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			slot1_partition: partition@0 {
				label = "image-1";
				reg = <0x00000000 DT_SIZE_K(640)>;
				};

			storage_partition: partition@a0000 {
				label = "storage";
				reg = <0x000a0000 DT_SIZE_M(15)>;
			};
		};
	};
};

&fmc {
	pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
		     &fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke0_pc3
		     &fmc_sdne0_ph3 &fmc_sdnras_pf11 &fmc_sdncas_pg15
		     &fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
		     &fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
		     &fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
		     &fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
		     &fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
		     &fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
		     &fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
		     &fmc_d15_pd10>;
	pinctrl-names = "default";
	status = "okay";

	sdram {
		status = "okay";
		power-up-delay = <100>;
		num-auto-refresh = <8>;
		mode-register = <0x220>;
		/*
		 * Auto refresh command shall be issued every 15.625 us
		 * and is calculated as ((15.625 * SDRAM_CLK_MHZ) - 20)
		 * Note: SDRAM_CLK_MHZ = HCLK_MHZ / 2 (108 MHz)
		 */
		refresh-rate = <1667>;
		bank@0 {
			reg = <0>;
			st,sdram-control = <STM32_FMC_SDRAM_NC_8
						STM32_FMC_SDRAM_NR_12
						STM32_FMC_SDRAM_MWID_16
						STM32_FMC_SDRAM_NB_4
						STM32_FMC_SDRAM_CAS_2
						STM32_FMC_SDRAM_SDCLK_PERIOD_2
						STM32_FMC_SDRAM_RBURST_ENABLE
						STM32_FMC_SDRAM_RPIPE_0>;
			st,sdram-timing = <2 6 4 6 2 2 2>;
		};
	};
};

&ltdc {
	pinctrl-0 = <&ltdc_r0_pi15 &ltdc_r1_pj0 &ltdc_r2_pj1 &ltdc_r3_pj2
		     &ltdc_r4_pj3 &ltdc_r5_pj4 &ltdc_r6_pj5 &ltdc_r7_pj6
		     &ltdc_g0_pj7 &ltdc_g1_pj8 &ltdc_g2_pj9 &ltdc_g3_pj10
		     &ltdc_g4_pj11 &ltdc_g5_pk0 &ltdc_g6_pk1 &ltdc_g7_pk2
		     &ltdc_b0_pe4 &ltdc_b1_pj13 &ltdc_b2_pj14 &ltdc_b3_pj15
		     &ltdc_b4_pg12 &ltdc_b5_pk4 &ltdc_b6_pk5 &ltdc_b7_pk6
		     &ltdc_de_pk7 &ltdc_clk_pi14 &ltdc_hsync_pi10 &ltdc_vsync_pi9>;
	pinctrl-names = "default";
	disp-on-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;
	bl-ctrl-gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
	ext-sdram = <&sdram1>;
	status = "okay";

	width = <480>;
	height = <272>;
	pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
	display-timings {
		compatible = "zephyr,panel-timing";
		de-active = <0>;
		pixelclk-active = <0>;
		hsync-active = <0>;
		vsync-active = <0>;
		hsync-len = <1>;
		vsync-len = <10>;
		hback-porch = <43>;
		vback-porch = <12>;
		hfront-porch = <8>;
		vfront-porch = <4>;
	};
	def-back-color-red = <0xFF>;
	def-back-color-green = <0xFF>;
	def-back-color-blue = <0xFF>;
};