dts/arm/adi/max32/max32690-pinctrl.dtsi

/*
 * Copyright (c) 2023-2024 Analog Devices, Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>

/ {
	soc {
		pinctrl: pin-controller@40008000 {

			/omit-if-no-ref/ spixr_sdio0_p0_1: spixr_sdio0_p0_1 {
				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
			};

			/omit-if-no-ref/ spixf_sdio0_p0_1: spixf_sdio0_p0_1 {
				pinmux = <MAX32_PINMUX(0, 1, AF2)>;
			};

			/omit-if-no-ref/ uart2c_tx_p0_1: uart2c_tx_p0_1 {
				pinmux = <MAX32_PINMUX(0, 1, AF3)>;
			};

			/omit-if-no-ref/ spixr_sdio2_p0_2: spixr_sdio2_p0_2 {
				pinmux = <MAX32_PINMUX(0, 2, AF1)>;
			};

			/omit-if-no-ref/ spixf_sdio2_p0_2: spixf_sdio2_p0_2 {
				pinmux = <MAX32_PINMUX(0, 2, AF2)>;
			};

			/omit-if-no-ref/ uart2c_cts_p0_2: uart2c_cts_p0_2 {
				pinmux = <MAX32_PINMUX(0, 2, AF3)>;
			};

			/omit-if-no-ref/ spixr_sck_p0_3: spixr_sck_p0_3 {
				pinmux = <MAX32_PINMUX(0, 3, AF1)>;
			};

			/omit-if-no-ref/ spixf_sck_p0_3: spixf_sck_p0_3 {
				pinmux = <MAX32_PINMUX(0, 3, AF2)>;
			};

			/omit-if-no-ref/ uart2c_rts_p0_3: uart2c_rts_p0_3 {
				pinmux = <MAX32_PINMUX(0, 3, AF3)>;
			};

			/omit-if-no-ref/ spixr_sdio3_p0_4: spixr_sdio3_p0_4 {
				pinmux = <MAX32_PINMUX(0, 4, AF1)>;
			};

			/omit-if-no-ref/ spixf_sdio3_p0_4: spixf_sdio3_p0_4 {
				pinmux = <MAX32_PINMUX(0, 4, AF2)>;
			};

			/omit-if-no-ref/ tmr0c_ioa_p0_4: tmr0c_ioa_p0_4 {
				pinmux = <MAX32_PINMUX(0, 4, AF3)>;
			};

			/omit-if-no-ref/ spixr_sdio1_p0_5: spixr_sdio1_p0_5 {
				pinmux = <MAX32_PINMUX(0, 5, AF1)>;
			};

			/omit-if-no-ref/ spixf_sdio1_p0_5: spixf_sdio1_p0_5 {
				pinmux = <MAX32_PINMUX(0, 5, AF2)>;
			};

			/omit-if-no-ref/ tmr2c_iob_p0_5: tmr2c_iob_p0_5 {
				pinmux = <MAX32_PINMUX(0, 5, AF3)>;
			};

			/omit-if-no-ref/ spixr_ss0_p0_6: spixr_ss0_p0_6 {
				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
			};

			/omit-if-no-ref/ spixf_ss0_p0_6: spixf_ss0_p0_6 {
				pinmux = <MAX32_PINMUX(0, 6, AF2)>;
			};

			/omit-if-no-ref/ uart2c_rx_p0_6: uart2c_rx_p0_6 {
				pinmux = <MAX32_PINMUX(0, 6, AF3)>;
			};

			/omit-if-no-ref/ owm_pe_p0_7: owm_pe_p0_7 {
				pinmux = <MAX32_PINMUX(0, 7, AF1)>;
			};

			/omit-if-no-ref/ tmr1b_ioa_p0_7: tmr1b_ioa_p0_7 {
				pinmux = <MAX32_PINMUX(0, 7, AF2)>;
			};

			/omit-if-no-ref/ owm_io_p0_8: owm_io_p0_8 {
				pinmux = <MAX32_PINMUX(0, 8, AF1)>;
			};

			/omit-if-no-ref/ tmr1b_iob_p0_8: tmr1b_iob_p0_8 {
				pinmux = <MAX32_PINMUX(0, 8, AF2)>;
			};

			/omit-if-no-ref/ adc_clk_ext_p0_9: adc_clk_ext_p0_9 {
				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
			};

			/omit-if-no-ref/ tmr0c_ioan_p0_9: tmr0c_ioan_p0_9 {
				pinmux = <MAX32_PINMUX(0, 9, AF3)>;
			};

			/omit-if-no-ref/ adc_trig_a_p0_10: adc_trig_a_p0_10 {
				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
			};

			/omit-if-no-ref/ tmr0c_iobn_p0_10: tmr0c_iobn_p0_10 {
				pinmux = <MAX32_PINMUX(0, 10, AF3)>;
			};

			/omit-if-no-ref/ i2c1a_sda_p0_11: i2c1a_sda_p0_11 {
				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
			};

			/omit-if-no-ref/ tmr1c_ioan_p0_11: tmr1c_ioan_p0_11 {
				pinmux = <MAX32_PINMUX(0, 11, AF3)>;
			};

			/omit-if-no-ref/ i2c1a_scl_p0_12: i2c1a_scl_p0_12 {
				pinmux = <MAX32_PINMUX(0, 12, AF1)>;
			};

			/omit-if-no-ref/ tmr1c_iobn_p0_12: tmr1c_iobn_p0_12 {
				pinmux = <MAX32_PINMUX(0, 12, AF3)>;
			};

			/omit-if-no-ref/ spi3a_ss1_p0_13: spi3a_ss1_p0_13 {
				pinmux = <MAX32_PINMUX(0, 13, AF1)>;
			};

			/omit-if-no-ref/ tmr0b_ioa_p0_13: tmr0b_ioa_p0_13 {
				pinmux = <MAX32_PINMUX(0, 13, AF2)>;
			};

			/omit-if-no-ref/ i2c2c_sda_p0_13: i2c2c_sda_p0_13 {
				pinmux = <MAX32_PINMUX(0, 13, AF3)>;
			};

			/omit-if-no-ref/ spi3a_ss2_p0_14: spi3a_ss2_p0_14 {
				pinmux = <MAX32_PINMUX(0, 14, AF1)>;
			};

			/omit-if-no-ref/ tmr0b_iob_p0_14: tmr0b_iob_p0_14 {
				pinmux = <MAX32_PINMUX(0, 14, AF2)>;
			};

			/omit-if-no-ref/ i2c2c_scl_p0_14: i2c2c_scl_p0_14 {
				pinmux = <MAX32_PINMUX(0, 14, AF3)>;
			};

			/omit-if-no-ref/ spi3a_sdio3_p0_15: spi3a_sdio3_p0_15 {
				pinmux = <MAX32_PINMUX(0, 15, AF1)>;
			};

			/omit-if-no-ref/ tmr1c_ioa_p0_15: tmr1c_ioa_p0_15 {
				pinmux = <MAX32_PINMUX(0, 15, AF3)>;
			};

			/omit-if-no-ref/ spi3a_sck_p0_16: spi3a_sck_p0_16 {
				pinmux = <MAX32_PINMUX(0, 16, AF1)>;
			};

			/omit-if-no-ref/ spi3a_sdio2_p0_17: spi3a_sdio2_p0_17 {
				pinmux = <MAX32_PINMUX(0, 17, AF1)>;
			};

			/omit-if-no-ref/ tmr1c_iob_p0_17: tmr1c_iob_p0_17 {
				pinmux = <MAX32_PINMUX(0, 17, AF3)>;
			};

			/omit-if-no-ref/ spi3a_ss0_p0_19: spi3a_ss0_p0_19 {
				pinmux = <MAX32_PINMUX(0, 19, AF1)>;
			};

			/omit-if-no-ref/ rv_tck_p0_19: rv_tck_p0_19 {
				pinmux = <MAX32_PINMUX(0, 19, AF2)>;
			};

			/omit-if-no-ref/ spi3a_miso_p0_20: spi3a_miso_p0_20 {
				pinmux = <MAX32_PINMUX(0, 20, AF1)>;
			};

			/omit-if-no-ref/ rv_tms_p0_20: rv_tms_p0_20 {
				pinmux = <MAX32_PINMUX(0, 20, AF2)>;
			};

			/omit-if-no-ref/ spi3a_mosi_p0_21: spi3a_mosi_p0_21 {
				pinmux = <MAX32_PINMUX(0, 21, AF1)>;
			};

			/omit-if-no-ref/ rv_tdi_p0_21: rv_tdi_p0_21 {
				pinmux = <MAX32_PINMUX(0, 21, AF2)>;
			};

			/omit-if-no-ref/ spi0a_ss0_p0_22: spi0a_ss0_p0_22 {
				pinmux = <MAX32_PINMUX(0, 22, AF1)>;
			};

			/omit-if-no-ref/ rv_tdo_p0_22: rv_tdo_p0_22 {
				pinmux = <MAX32_PINMUX(0, 22, AF2)>;
			};

			/omit-if-no-ref/ pt15_p0_23: pt15_p0_23 {
				pinmux = <MAX32_PINMUX(0, 23, AF1)>;
			};

			/omit-if-no-ref/ i2s0b_clkext_p0_23: i2s0b_clkext_p0_23 {
				pinmux = <MAX32_PINMUX(0, 23, AF2)>;
			};

			/omit-if-no-ref/ rxev0_p0_24: rxev0_p0_24 {
				pinmux = <MAX32_PINMUX(0, 24, AF1)>;
			};

			/omit-if-no-ref/ i2s0b_sck_p0_24: i2s0b_sck_p0_24 {
				pinmux = <MAX32_PINMUX(0, 24, AF2)>;
			};

			/omit-if-no-ref/ txevo_p0_25: txevo_p0_25 {
				pinmux = <MAX32_PINMUX(0, 25, AF1)>;
			};

			/omit-if-no-ref/ i2s0b_sdi_p0_25: i2s0b_sdi_p0_25 {
				pinmux = <MAX32_PINMUX(0, 25, AF2)>;
			};

			/omit-if-no-ref/ i2s0b_sdo_p0_26: i2s0b_sdo_p0_26 {
				pinmux = <MAX32_PINMUX(0, 26, AF2)>;
			};

			/omit-if-no-ref/ erfo_clk_out_p0_27: erfo_clk_out_p0_27 {
				pinmux = <MAX32_PINMUX(0, 27, AF1)>;
			};

			/omit-if-no-ref/ i2s0b_ws_p0_27: i2s0b_ws_p0_27 {
				pinmux = <MAX32_PINMUX(0, 27, AF2)>;
			};

			/omit-if-no-ref/ i2c0a_sda_p0_30: i2c0a_sda_p0_30 {
				pinmux = <MAX32_PINMUX(0, 30, AF1)>;
			};

			/omit-if-no-ref/ i2c0a_scl_p0_31: i2c0a_scl_p0_31 {
				pinmux = <MAX32_PINMUX(0, 31, AF1)>;
			};

			/omit-if-no-ref/ spi4a_ss0_p1_0: spi4a_ss0_p1_0 {
				pinmux = <MAX32_PINMUX(1, 0, AF1)>;
			};

			/omit-if-no-ref/ adc_trig_b_p1_0: adc_trig_b_p1_0 {
				pinmux = <MAX32_PINMUX(1, 0, AF2)>;
			};

			/omit-if-no-ref/ spi4a_mosi_p1_1: spi4a_mosi_p1_1 {
				pinmux = <MAX32_PINMUX(1, 1, AF1)>;
			};

			/omit-if-no-ref/ spi4a_miso_p1_2: spi4a_miso_p1_2 {
				pinmux = <MAX32_PINMUX(1, 2, AF1)>;
			};

			/omit-if-no-ref/ spi4a_sck_p1_3: spi4a_sck_p1_3 {
				pinmux = <MAX32_PINMUX(1, 3, AF1)>;
			};

			/omit-if-no-ref/ spi4a_sdio2_p1_4: spi4a_sdio2_p1_4 {
				pinmux = <MAX32_PINMUX(1, 4, AF1)>;
			};

			/omit-if-no-ref/ tmr2b_ioa_p1_4: tmr2b_ioa_p1_4 {
				pinmux = <MAX32_PINMUX(1, 4, AF2)>;
			};

			/omit-if-no-ref/ spi4a_sdio3_p1_5: spi4a_sdio3_p1_5 {
				pinmux = <MAX32_PINMUX(1, 5, AF1)>;
			};

			/omit-if-no-ref/ tmr2b_iob_p1_5: tmr2b_iob_p1_5 {
				pinmux = <MAX32_PINMUX(1, 5, AF2)>;
			};

			/omit-if-no-ref/ spi4a_ss1_p1_6: spi4a_ss1_p1_6 {
				pinmux = <MAX32_PINMUX(1, 6, AF1)>;
			};

			/omit-if-no-ref/ pt0_p1_6: pt0_p1_6 {
				pinmux = <MAX32_PINMUX(1, 6, AF2)>;
			};

			/omit-if-no-ref/ uart2a_cts_p1_7: uart2a_cts_p1_7 {
				pinmux = <MAX32_PINMUX(1, 7, AF1)>;
			};

			/omit-if-no-ref/ pt1_p1_7: pt1_p1_7 {
				pinmux = <MAX32_PINMUX(1, 7, AF2)>;
			};

			/omit-if-no-ref/ i2c2c_sda_p1_7: i2c2c_sda_p1_7 {
				pinmux = <MAX32_PINMUX(1, 7, AF3)>;
			};

			/omit-if-no-ref/ uart2a_rts_p1_8: uart2a_rts_p1_8 {
				pinmux = <MAX32_PINMUX(1, 8, AF1)>;
			};

			/omit-if-no-ref/ pt2_p1_8: pt2_p1_8 {
				pinmux = <MAX32_PINMUX(1, 8, AF2)>;
			};

			/omit-if-no-ref/ i2c2c_scl_p1_8: i2c2c_scl_p1_8 {
				pinmux = <MAX32_PINMUX(1, 8, AF3)>;
			};

			/omit-if-no-ref/ uart2a_rx_p1_9: uart2a_rx_p1_9 {
				pinmux = <MAX32_PINMUX(1, 9, AF1)>;
			};

			/omit-if-no-ref/ pt3_p1_9: pt3_p1_9 {
				pinmux = <MAX32_PINMUX(1, 9, AF2)>;
			};

			/omit-if-no-ref/ uart2a_tx_p1_10: uart2a_tx_p1_10 {
				pinmux = <MAX32_PINMUX(1, 10, AF1)>;
			};

			/omit-if-no-ref/ pt4_p1_10: pt4_p1_10 {
				pinmux = <MAX32_PINMUX(1, 10, AF2)>;
			};

			/omit-if-no-ref/ spi4a_ss2_p1_11: spi4a_ss2_p1_11 {
				pinmux = <MAX32_PINMUX(1, 11, AF1)>;
			};

			/omit-if-no-ref/ hyp_cs0n_p1_11: hyp_cs0n_p1_11 {
				pinmux = <MAX32_PINMUX(1, 11, AF3)>;
			};

			/omit-if-no-ref/ pt5_p1_12: pt5_p1_12 {
				pinmux = <MAX32_PINMUX(1, 12, AF1)>;
			};

			/omit-if-no-ref/ hyp_d0_p1_12: hyp_d0_p1_12 {
				pinmux = <MAX32_PINMUX(1, 12, AF2)>;
			};

			/omit-if-no-ref/ tmr3a_ioa_p1_13: tmr3a_ioa_p1_13 {
				pinmux = <MAX32_PINMUX(1, 13, AF1)>;
			};

			/omit-if-no-ref/ hyp_d4_p1_13: hyp_d4_p1_13 {
				pinmux = <MAX32_PINMUX(1, 13, AF3)>;
			};

			/omit-if-no-ref/ tmr3a_iob_p1_14: tmr3a_iob_p1_14 {
				pinmux = <MAX32_PINMUX(1, 14, AF1)>;
			};

			/omit-if-no-ref/ hyp_rwds_p1_14: hyp_rwds_p1_14 {
				pinmux = <MAX32_PINMUX(1, 14, AF3)>;
			};

			/omit-if-no-ref/ hyp_d1_p1_15: hyp_d1_p1_15 {
				pinmux = <MAX32_PINMUX(1, 15, AF3)>;
			};

			/omit-if-no-ref/ hyp_d5_p1_16: hyp_d5_p1_16 {
				pinmux = <MAX32_PINMUX(1, 16, AF3)>;
			};

			/omit-if-no-ref/ pt9_p1_17: pt9_p1_17 {
				pinmux = <MAX32_PINMUX(1, 17, AF1)>;
			};

			/omit-if-no-ref/ hyp_cs1n_p1_17: hyp_cs1n_p1_17 {
				pinmux = <MAX32_PINMUX(1, 17, AF3)>;
			};

			/omit-if-no-ref/ pt6_p1_18: pt6_p1_18 {
				pinmux = <MAX32_PINMUX(1, 18, AF2)>;
			};

			/omit-if-no-ref/ hyp_d6_p1_18: hyp_d6_p1_18 {
				pinmux = <MAX32_PINMUX(1, 18, AF3)>;
			};

			/omit-if-no-ref/ pt7_p1_19: pt7_p1_19 {
				pinmux = <MAX32_PINMUX(1, 19, AF2)>;
			};

			/omit-if-no-ref/ hyp_d2_p1_19: hyp_d2_p1_19 {
				pinmux = <MAX32_PINMUX(1, 19, AF3)>;
			};

			/omit-if-no-ref/ hyp_d3_p1_20: hyp_d3_p1_20 {
				pinmux = <MAX32_PINMUX(1, 20, AF3)>;
			};

			/omit-if-no-ref/ pt8_p1_21: pt8_p1_21 {
				pinmux = <MAX32_PINMUX(1, 21, AF2)>;
			};

			/omit-if-no-ref/ hyp_d7_p1_21: hyp_d7_p1_21 {
				pinmux = <MAX32_PINMUX(1, 21, AF3)>;
			};

			/omit-if-no-ref/ spi1a_ss0_p1_23: spi1a_ss0_p1_23 {
				pinmux = <MAX32_PINMUX(1, 23, AF1)>;
			};

			/omit-if-no-ref/ spi1a_ss2_p1_24: spi1a_ss2_p1_24 {
				pinmux = <MAX32_PINMUX(1, 24, AF1)>;
			};

			/omit-if-no-ref/ can0b_rx_p1_24: can0b_rx_p1_24 {
				pinmux = <MAX32_PINMUX(1, 24, AF2)>;
			};

			/omit-if-no-ref/ spi1a_ss1_p1_25: spi1a_ss1_p1_25 {
				pinmux = <MAX32_PINMUX(1, 25, AF1)>;
			};

			/omit-if-no-ref/ can0b_tx_p1_25: can0b_tx_p1_25 {
				pinmux = <MAX32_PINMUX(1, 25, AF2)>;
			};

			/omit-if-no-ref/ spi1a_sck_p1_26: spi1a_sck_p1_26 {
				pinmux = <MAX32_PINMUX(1, 26, AF1)>;
			};

			/omit-if-no-ref/ spi2a_ss2_p1_27: spi2a_ss2_p1_27 {
				pinmux = <MAX32_PINMUX(1, 27, AF1)>;
			};

			/omit-if-no-ref/ spi1a_miso_p1_28: spi1a_miso_p1_28 {
				pinmux = <MAX32_PINMUX(1, 28, AF1)>;
			};

			/omit-if-no-ref/ can1b_rx_p1_28: can1b_rx_p1_28 {
				pinmux = <MAX32_PINMUX(1, 28, AF2)>;
			};

			/omit-if-no-ref/ spi1a_mosi_p1_29: spi1a_mosi_p1_29 {
				pinmux = <MAX32_PINMUX(1, 29, AF1)>;
			};

			/omit-if-no-ref/ can1b_tx_p1_29: can1b_tx_p1_29 {
				pinmux = <MAX32_PINMUX(1, 29, AF2)>;
			};

			/omit-if-no-ref/ owm_pe_p1_30: owm_pe_p1_30 {
				pinmux = <MAX32_PINMUX(1, 30, AF1)>;
			};

			/omit-if-no-ref/ spi1b_sdio2_p1_30: spi1b_sdio2_p1_30 {
				pinmux = <MAX32_PINMUX(1, 30, AF2)>;
			};

			/omit-if-no-ref/ owm_io_p1_31: owm_io_p1_31 {
				pinmux = <MAX32_PINMUX(1, 31, AF1)>;
			};

			/omit-if-no-ref/ spi1b_sdio3_p1_31: spi1b_sdio3_p1_31 {
				pinmux = <MAX32_PINMUX(1, 31, AF2)>;
			};

			/omit-if-no-ref/ spi2a_ss1_p2_1: spi2a_ss1_p2_1 {
				pinmux = <MAX32_PINMUX(2, 1, AF1)>;
			};

			/omit-if-no-ref/ pt10_p2_1: pt10_p2_1 {
				pinmux = <MAX32_PINMUX(2, 1, AF2)>;
			};

			/omit-if-no-ref/ spi2a_sck_p2_2: spi2a_sck_p2_2 {
				pinmux = <MAX32_PINMUX(2, 2, AF1)>;
			};

			/omit-if-no-ref/ spi2a_miso_p2_3: spi2a_miso_p2_3 {
				pinmux = <MAX32_PINMUX(2, 3, AF1)>;
			};

			/omit-if-no-ref/ spi2a_mosi_p2_4: spi2a_mosi_p2_4 {
				pinmux = <MAX32_PINMUX(2, 4, AF1)>;
			};

			/omit-if-no-ref/ spi2a_ss0_p2_5: spi2a_ss0_p2_5 {
				pinmux = <MAX32_PINMUX(2, 5, AF1)>;
			};

			/omit-if-no-ref/ pt11_p2_5: pt11_p2_5 {
				pinmux = <MAX32_PINMUX(2, 5, AF2)>;
			};

			/omit-if-no-ref/ spi2b_sdio2_p2_6: spi2b_sdio2_p2_6 {
				pinmux = <MAX32_PINMUX(2, 6, AF2)>;
			};

			/omit-if-no-ref/ i2c0a_sda_p2_7: i2c0a_sda_p2_7 {
				pinmux = <MAX32_PINMUX(2, 7, AF1)>;
			};

			/omit-if-no-ref/ spi2b_sdio3_p2_7: spi2b_sdio3_p2_7 {
				pinmux = <MAX32_PINMUX(2, 7, AF2)>;
			};

			/omit-if-no-ref/ i2c0a_scl_p2_8: i2c0a_scl_p2_8 {
				pinmux = <MAX32_PINMUX(2, 8, AF1)>;
			};

			/omit-if-no-ref/ uart0a_cts_p2_9: uart0a_cts_p2_9 {
				pinmux = <MAX32_PINMUX(2, 9, AF1)>;
			};

			/omit-if-no-ref/ pt12_p2_9: pt12_p2_9 {
				pinmux = <MAX32_PINMUX(2, 9, AF2)>;
			};

			/omit-if-no-ref/ uart0a_rts_p2_10: uart0a_rts_p2_10 {
				pinmux = <MAX32_PINMUX(2, 10, AF1)>;
			};

			/omit-if-no-ref/ pt14_p2_10: pt14_p2_10 {
				pinmux = <MAX32_PINMUX(2, 10, AF2)>;
			};

			/omit-if-no-ref/ uart0a_rx_p2_11: uart0a_rx_p2_11 {
				pinmux = <MAX32_PINMUX(2, 11, AF1)>;
			};

			/omit-if-no-ref/ pt13_p2_11: pt13_p2_11 {
				pinmux = <MAX32_PINMUX(2, 11, AF2)>;
			};

			/omit-if-no-ref/ uart0a_tx_p2_12: uart0a_tx_p2_12 {
				pinmux = <MAX32_PINMUX(2, 12, AF1)>;
			};

			/omit-if-no-ref/ pt15_p2_12: pt15_p2_12 {
				pinmux = <MAX32_PINMUX(2, 12, AF2)>;
			};

			/omit-if-no-ref/ uart1a_cts_p2_13: uart1a_cts_p2_13 {
				pinmux = <MAX32_PINMUX(2, 13, AF1)>;
			};

			/omit-if-no-ref/ uart1a_rx_p2_14: uart1a_rx_p2_14 {
				pinmux = <MAX32_PINMUX(2, 14, AF1)>;
			};

			/omit-if-no-ref/ uart1a_rts_p2_15: uart1a_rts_p2_15 {
				pinmux = <MAX32_PINMUX(2, 15, AF1)>;
			};

			/omit-if-no-ref/ adc_hw_trig_c_p2_15: adc_hw_trig_c_p2_15 {
				pinmux = <MAX32_PINMUX(2, 15, AF2)>;
			};

			/omit-if-no-ref/ uart1a_tx_p2_16: uart1a_tx_p2_16 {
				pinmux = <MAX32_PINMUX(2, 16, AF1)>;
			};

			/omit-if-no-ref/ i2c1a_sda_p2_17: i2c1a_sda_p2_17 {
				pinmux = <MAX32_PINMUX(2, 17, AF1)>;
			};

			/omit-if-no-ref/ ble_ant_ctrl1_p2_17: ble_ant_ctrl1_p2_17 {
				pinmux = <MAX32_PINMUX(2, 17, AF2)>;
			};

			/omit-if-no-ref/ i2c1a_scl_p2_18: i2c1a_scl_p2_18 {
				pinmux = <MAX32_PINMUX(2, 18, AF1)>;
			};

			/omit-if-no-ref/ ble_ant_ctrl0_p2_18: ble_ant_ctrl0_p2_18 {
				pinmux = <MAX32_PINMUX(2, 18, AF2)>;
			};

			/omit-if-no-ref/ pt5_p2_20: pt5_p2_20 {
				pinmux = <MAX32_PINMUX(2, 20, AF1)>;
			};

			/omit-if-no-ref/ ble_ant_ctrl2_p2_20: ble_ant_ctrl2_p2_20 {
				pinmux = <MAX32_PINMUX(2, 20, AF2)>;
			};

			/omit-if-no-ref/ tmr2c_ioa_p2_20: tmr2c_ioa_p2_20 {
				pinmux = <MAX32_PINMUX(2, 20, AF3)>;
			};

			/omit-if-no-ref/ pt7_p2_21: pt7_p2_21 {
				pinmux = <MAX32_PINMUX(2, 21, AF1)>;
			};

			/omit-if-no-ref/ ble_ant_ctrl3_p2_21: ble_ant_ctrl3_p2_21 {
				pinmux = <MAX32_PINMUX(2, 21, AF2)>;
			};

			/omit-if-no-ref/ tmr2c_iob_p2_21: tmr2c_iob_p2_21 {
				pinmux = <MAX32_PINMUX(2, 21, AF3)>;
			};

			/omit-if-no-ref/ pt8_p2_22: pt8_p2_22 {
				pinmux = <MAX32_PINMUX(2, 22, AF1)>;
			};

			/omit-if-no-ref/ can0b_rx_p2_22: can0b_rx_p2_22 {
				pinmux = <MAX32_PINMUX(2, 22, AF2)>;
			};

			/omit-if-no-ref/ pt6_p2_23: pt6_p2_23 {
				pinmux = <MAX32_PINMUX(2, 23, AF1)>;
			};

			/omit-if-no-ref/ can0b_tx_p2_23: can0b_tx_p2_23 {
				pinmux = <MAX32_PINMUX(2, 23, AF2)>;
			};

			/omit-if-no-ref/ pt10_p2_24: pt10_p2_24 {
				pinmux = <MAX32_PINMUX(2, 24, AF1)>;
			};

			/omit-if-no-ref/ can1b_rx_p2_24: can1b_rx_p2_24 {
				pinmux = <MAX32_PINMUX(2, 24, AF2)>;
			};

			/omit-if-no-ref/ pt11_p2_25: pt11_p2_25 {
				pinmux = <MAX32_PINMUX(2, 25, AF1)>;
			};

			/omit-if-no-ref/ can1b_tx_p2_25: can1b_tx_p2_25 {
				pinmux = <MAX32_PINMUX(2, 25, AF2)>;
			};

			/omit-if-no-ref/ pt12_p2_26: pt12_p2_26 {
				pinmux = <MAX32_PINMUX(2, 26, AF1)>;
			};

			/omit-if-no-ref/ spi0b_ss1_p2_26: spi0b_ss1_p2_26 {
				pinmux = <MAX32_PINMUX(2, 26, AF2)>;
			};

			/omit-if-no-ref/ i2s0c_ws_p2_26: i2s0c_ws_p2_26 {
				pinmux = <MAX32_PINMUX(2, 26, AF3)>;
			};

			/omit-if-no-ref/ pt13_p2_27: pt13_p2_27 {
				pinmux = <MAX32_PINMUX(2, 27, AF1)>;
			};

			/omit-if-no-ref/ spi0b_miso_p2_27: spi0b_miso_p2_27 {
				pinmux = <MAX32_PINMUX(2, 27, AF2)>;
			};

			/omit-if-no-ref/ i2s0c_sdi_p2_27: i2s0c_sdi_p2_27 {
				pinmux = <MAX32_PINMUX(2, 27, AF3)>;
			};

			/omit-if-no-ref/ pt14_p2_28: pt14_p2_28 {
				pinmux = <MAX32_PINMUX(2, 28, AF1)>;
			};

			/omit-if-no-ref/ spi0b_mosi_p2_28: spi0b_mosi_p2_28 {
				pinmux = <MAX32_PINMUX(2, 28, AF2)>;
			};

			/omit-if-no-ref/ i2s0c_sdo_p2_28: i2s0c_sdo_p2_28 {
				pinmux = <MAX32_PINMUX(2, 28, AF3)>;
			};

			/omit-if-no-ref/ pt0_p2_29: pt0_p2_29 {
				pinmux = <MAX32_PINMUX(2, 29, AF1)>;
			};

			/omit-if-no-ref/ spi0b_sck_p2_29: spi0b_sck_p2_29 {
				pinmux = <MAX32_PINMUX(2, 29, AF2)>;
			};

			/omit-if-no-ref/ i2s0c_sck_p2_29: i2s0c_sck_p2_29 {
				pinmux = <MAX32_PINMUX(2, 29, AF3)>;
			};

			/omit-if-no-ref/ pt1_p2_30: pt1_p2_30 {
				pinmux = <MAX32_PINMUX(2, 30, AF1)>;
			};

			/omit-if-no-ref/ spi0b_sdio2_p2_30: spi0b_sdio2_p2_30 {
				pinmux = <MAX32_PINMUX(2, 30, AF2)>;
			};

			/omit-if-no-ref/ tmr3c_ioa_p2_30: tmr3c_ioa_p2_30 {
				pinmux = <MAX32_PINMUX(2, 30, AF3)>;
			};

			/omit-if-no-ref/ pt2_p2_31: pt2_p2_31 {
				pinmux = <MAX32_PINMUX(2, 31, AF1)>;
			};

			/omit-if-no-ref/ spi0b_sdio3_p2_31: spi0b_sdio3_p2_31 {
				pinmux = <MAX32_PINMUX(2, 31, AF2)>;
			};

			/omit-if-no-ref/ tmr3c_iob_p2_31: tmr3c_iob_p2_31 {
				pinmux = <MAX32_PINMUX(2, 31, AF3)>;
			};

			/omit-if-no-ref/ ain0_p3_0: ain0_p3_0 {
				pinmux = <MAX32_PINMUX(3, 0, AF1)>;
			};

			/omit-if-no-ref/ lpuart0b_rx_p3_0: lpuart0b_rx_p3_0 {
				pinmux = <MAX32_PINMUX(3, 0, AF2)>;
			};

			/omit-if-no-ref/ ain1_p3_1: ain1_p3_1 {
				pinmux = <MAX32_PINMUX(3, 1, AF1)>;
			};

			/omit-if-no-ref/ lpuart0b_tx_p3_1: lpuart0b_tx_p3_1 {
				pinmux = <MAX32_PINMUX(3, 1, AF2)>;
			};

			/omit-if-no-ref/ ain2_p3_2: ain2_p3_2 {
				pinmux = <MAX32_PINMUX(3, 2, AF1)>;
			};

			/omit-if-no-ref/ lpuart0b_cts_p3_2: lpuart0b_cts_p3_2 {
				pinmux = <MAX32_PINMUX(3, 2, AF2)>;
			};

			/omit-if-no-ref/ ain3_p3_3: ain3_p3_3 {
				pinmux = <MAX32_PINMUX(3, 3, AF1)>;
			};

			/omit-if-no-ref/ lpuart0b_rts_p3_3: lpuart0b_rts_p3_3 {
				pinmux = <MAX32_PINMUX(3, 3, AF2)>;
			};

			/omit-if-no-ref/ ain4_p3_4: ain4_p3_4 {
				pinmux = <MAX32_PINMUX(3, 4, AF1)>;
			};

			/omit-if-no-ref/ lptmr0b_ioa_p3_4: lptmr0b_ioa_p3_4 {
				pinmux = <MAX32_PINMUX(3, 4, AF2)>;
			};

			/omit-if-no-ref/ ain5_p3_5: ain5_p3_5 {
				pinmux = <MAX32_PINMUX(3, 5, AF1)>;
			};

			/omit-if-no-ref/ ain6_p3_6: ain6_p3_6 {
				pinmux = <MAX32_PINMUX(3, 6, AF1)>;
			};

			/omit-if-no-ref/ ain7_p3_7: ain7_p3_7 {
				pinmux = <MAX32_PINMUX(3, 7, AF1)>;
			};

			/omit-if-no-ref/ lptmr1b_ioa_p3_7: lptmr1b_ioa_p3_7 {
				pinmux = <MAX32_PINMUX(3, 7, AF2)>;
			};

		};
	};
};