| /* |
| * Copyright (c) 2019 SEAL AG |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <arm/armv7-m.dtsi> |
| #include <zephyr/dt-bindings/adc/adc.h> |
| #include <zephyr/dt-bindings/clock/kinetis_mcg.h> |
| #include <zephyr/dt-bindings/clock/kinetis_sim.h> |
| #include <zephyr/dt-bindings/gpio/gpio.h> |
| #include <zephyr/dt-bindings/i2c/i2c.h> |
| |
| / { |
| aliases { |
| watchdog0 = &wdog; |
| }; |
| |
| chosen { |
| zephyr,entropy = &trng; |
| zephyr,flash-controller = &ftfa; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-m4f"; |
| reg = <0>; |
| }; |
| }; |
| |
| /* Dummy pinctrl node, filled with pin mux options at board level */ |
| pinctrl: pinctrl { |
| compatible = "nxp,kinetis-pinctrl"; |
| status = "okay"; |
| }; |
| |
| soc { |
| mpu: mpu@4000d000 { |
| compatible = "nxp,kinetis-mpu"; |
| reg = <0x4000d000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| sim: sim@40047000 { |
| compatible = "nxp,kinetis-sim"; |
| reg = <0x40047000 0x2000>; |
| #clock-cells = <3>; |
| |
| core_clk { |
| compatible = "fixed-factor-clock"; |
| clocks = <&mcg KINETIS_MCG_OUT_CLK>; |
| clock-div = <1>; |
| #clock-cells = <0>; |
| }; |
| |
| bus_clk { |
| compatible = "fixed-factor-clock"; |
| clocks = <&mcg KINETIS_MCG_OUT_CLK>; |
| clock-div = <2>; |
| #clock-cells = <0>; |
| }; |
| |
| flexbus_clk { |
| compatible = "fixed-factor-clock"; |
| clocks = <&mcg KINETIS_MCG_OUT_CLK>; |
| clock-div = <2>; |
| #clock-cells = <0>; |
| }; |
| |
| flash_clk { |
| compatible = "fixed-factor-clock"; |
| clocks = <&mcg KINETIS_MCG_OUT_CLK>; |
| clock-div = <5>; |
| #clock-cells = <0>; |
| }; |
| }; |
| |
| mcg: clock-controller@40064000 { |
| compatible = "nxp,kinetis-mcg"; |
| reg = <0x40064000 0x1000>; |
| #clock-cells = <1>; |
| }; |
| |
| osc: clock-controller@40065000 { |
| compatible = "nxp,k8x-osc"; |
| reg = <0x40065000 0x4>; |
| enable-external-reference; |
| }; |
| |
| ftfa: flash-controller@40020000 { |
| compatible = "nxp,kinetis-ftfa"; |
| reg = <0x40020000 0x1000>; |
| interrupts = <18 0>, <19 0>; |
| interrupt-names = "command-complete", "read-collision"; |
| status = "okay"; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| }; |
| |
| adc0: adc@4003b000 { |
| compatible = "nxp,kinetis-adc16"; |
| reg = <0x4003b000 0x1000>; |
| clocks = <&sim KINETIS_SIM_SIM_SOPT7 0 0xF>, |
| <&sim KINETIS_SIM_SIM_SOPT7 7 0x80>; |
| interrupts = <39 0>; |
| dmas = <&edma0 0 40>; |
| dma-names = "adc0"; |
| clk-source = <0>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| |
| gpioa: gpio@400ff000 { |
| compatible = "nxp,kinetis-gpio"; |
| status = "disabled"; |
| reg = <0x400ff000 0x40>; |
| interrupts = <59 2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| nxp,kinetis-port = <&porta>; |
| }; |
| |
| gpiob: gpio@400ff040 { |
| compatible = "nxp,kinetis-gpio"; |
| status = "disabled"; |
| reg = <0x400ff040 0x40>; |
| interrupts = <60 2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| nxp,kinetis-port = <&portb>; |
| }; |
| |
| gpioc: gpio@400ff080 { |
| compatible = "nxp,kinetis-gpio"; |
| status = "disabled"; |
| reg = <0x400ff080 0x40>; |
| interrupts = <61 2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| nxp,kinetis-port = <&portc>; |
| }; |
| |
| gpiod: gpio@400ff0c0 { |
| compatible = "nxp,kinetis-gpio"; |
| status = "disabled"; |
| reg = <0x400ff0c0 0x40>; |
| interrupts = <62 2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| nxp,kinetis-port = <&portd>; |
| }; |
| |
| gpioe: gpio@400ff100 { |
| compatible = "nxp,kinetis-gpio"; |
| status = "disabled"; |
| reg = <0x400ff100 0x40>; |
| interrupts = <63 2>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| nxp,kinetis-port = <&porte>; |
| }; |
| |
| i2c0: i2c@40066000 { |
| compatible = "nxp,kinetis-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40066000 0x1000>; |
| interrupts = <24 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>; |
| status = "disabled"; |
| }; |
| |
| i2c1: i2c@40067000 { |
| compatible = "nxp,kinetis-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40067000 0x1000>; |
| interrupts = <25 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>; |
| status = "disabled"; |
| }; |
| |
| i2c2: i2c@400e6000 { |
| compatible = "nxp,kinetis-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x400e6000 0x1000>; |
| interrupts = <74 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 6>; |
| status = "disabled"; |
| }; |
| |
| i2c3: i2c@400e7000 { |
| compatible = "nxp,kinetis-i2c"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x400e7000 0x1000>; |
| interrupts = <91 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1028 7>; |
| status = "disabled"; |
| }; |
| |
| lpuart0: lpuart@400c4000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x400c4000 0x1000>; |
| interrupts = <30 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 4>; |
| dmas = <&edma0 1 2>, <&edma0 2 3>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| lpuart1: lpuart@400c5000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x400c5000 0x1000>; |
| interrupts = <31 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 5>; |
| dmas = <&edma0 3 4>, <&edma0 4 5>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| lpuart2: lpuart@400c6000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x400c6000 0x1000>; |
| interrupts = <32 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 6>; |
| dmas = <&edma0 5 6>, <&edma0 6 7>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| lpuart3: lpuart@400c7000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x400c7000 0x1000>; |
| interrupts = <33 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 7>; |
| dmas = <&edma0 7 8>, <&edma0 8 9>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| lpuart4: lpuart@400d6000 { |
| compatible = "nxp,kinetis-lpuart"; |
| reg = <0x400d6000 0x1000>; |
| interrupts = <34 0>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x102c 22>; |
| dmas = <&edma0 9 10>, <&edma0 10 11>; |
| dma-names = "rx", "tx"; |
| status = "disabled"; |
| }; |
| |
| porta: pinmux@40049000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x40049000 0x1000>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; |
| }; |
| |
| portb: pinmux@4004a000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004a000 0x1000>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; |
| }; |
| |
| portc: pinmux@4004b000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004b000 0x1000>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; |
| }; |
| |
| portd: pinmux@4004c000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004c000 0x1000>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; |
| }; |
| |
| porte: pinmux@4004d000 { |
| compatible = "nxp,kinetis-pinmux"; |
| reg = <0x4004d000 0x1000>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; |
| }; |
| |
| ftm0: ftm@40038000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x40038000 0x1000>; |
| interrupts = <42 0>; |
| clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>; |
| prescaler = <16>; |
| status = "disabled"; |
| }; |
| |
| ftm1: ftm@40039000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x40039000 0x1000>; |
| interrupts = <43 0>; |
| clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>; |
| prescaler = <16>; |
| status = "disabled"; |
| }; |
| |
| ftm2: ftm@4003a000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x4003a000 0x1000>; |
| interrupts = <44 0>; |
| clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>; |
| prescaler = <16>; |
| status = "disabled"; |
| }; |
| |
| ftm3: ftm@400b9000 { |
| compatible = "nxp,kinetis-ftm"; |
| reg = <0x400b9000 0x1000>; |
| interrupts = <71 0>; |
| clocks = <&mcg KINETIS_MCG_FIXED_FREQ_CLK>; |
| prescaler = <16>; |
| status = "disabled"; |
| }; |
| |
| rtc: rtc@4003d000 { |
| compatible = "nxp,kinetis-rtc"; |
| reg = <0x4003d000 0x1000>; |
| interrupts = <46 0>, <47 0>; |
| interrupt-names = "alarm", "seconds"; |
| clock-frequency = <32768>; |
| prescaler = <32768>; |
| }; |
| |
| spi0: spi@4002c000 { |
| compatible = "nxp,kinetis-dspi"; |
| reg = <0x4002c000 0x1000>; |
| interrupts = <26 3>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 12>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| spi1: spi@4002d000 { |
| compatible = "nxp,kinetis-dspi"; |
| reg = <0x4002d000 0x1000>; |
| interrupts = <27 3>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 13>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| spi2: spi@400ac000 { |
| compatible = "nxp,kinetis-dspi"; |
| reg = <0x400ac000 0x1000>; |
| interrupts = <65 3>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x1030 12>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| trng: random@400a0000 { |
| compatible = "nxp,kinetis-trng"; |
| reg = <0x400a0000 0x1000>; |
| interrupts = <23 0>; |
| }; |
| |
| usbotg: usbd@40072000 { |
| compatible = "nxp,kinetis-usbd"; |
| reg = <0x40072000 0x1000>; |
| interrupts = <53 1>; |
| interrupt-names = "usb_otg"; |
| num-bidir-endpoints = <16>; |
| status = "disabled"; |
| }; |
| |
| wdog: watchdog@40052000 { |
| compatible = "nxp,kinetis-wdog"; |
| reg = <0x40052000 0x1000>; |
| interrupts = <22 0>; |
| clocks = <&sim KINETIS_SIM_LPO_CLK 0 0>; |
| }; |
| |
| pit0: pit@40037000 { |
| compatible = "nxp,pit"; |
| reg = <0x40037000 0x1000>; |
| clocks = <&sim KINETIS_SIM_BUS_CLK 0x103c 23>; |
| status = "disabled"; |
| max-load-value = <0xffffffff>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| pit0_channel0: pit0_channel@0 { |
| compatible = "nxp,pit-channel"; |
| reg = <0>; |
| interrupts = <48 0>; |
| status = "disabled"; |
| }; |
| |
| pit0_channel1: pit0_channel@1 { |
| compatible = "nxp,pit-channel"; |
| reg = <1>; |
| interrupts = <49 0>; |
| status = "disabled"; |
| }; |
| |
| pit0_channel2: pit0_channel@2 { |
| compatible = "nxp,pit-channel"; |
| reg = <2>; |
| interrupts = <50 0>; |
| status = "disabled"; |
| }; |
| |
| pit0_channel3: pit0_channel@3 { |
| compatible = "nxp,pit-channel"; |
| reg = <3>; |
| interrupts = <51 0>; |
| status = "disabled"; |
| }; |
| }; |
| |
| edma0: dma-controller@40008000 { |
| #dma-cells = <2>; |
| compatible = "nxp,mcux-edma"; |
| nxp,version = <2>; |
| dma-channels = <16>; |
| dma-requests = <64>; |
| nxp,mem2mem; |
| reg = <0x40008000 0x1000>, |
| <0x40021000 0x1000>; |
| interrupts = <0 0>, <1 0>, <2 0>, <3 0>, |
| <4 0>, <5 0>, <6 0>, <7 0>, |
| <8 0>, <9 0>, <10 0>, <11 0>, |
| <12 0>, <13 0>, <14 0>, <15 0>, |
| <16 0>; |
| clocks = <&sim KINETIS_SIM_DMA_CLK 0x1040 0x00000002>, |
| <&sim KINETIS_SIM_DMAMUX_CLK 0x103C 0x00000002>; |
| status = "disabled"; |
| }; |
| |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <4>; |
| }; |
