| /* |
| * Copyright (c) 2021 Sateesh Kotapati |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include "efr32bg2x.dtsi" |
| #include <dt-bindings/clock/silabs/xg22-clock.h> |
| #include <mem.h> |
| |
| / { |
| clocks { |
| euart0clk: euart0clk { |
| #clock-cells = <0>; |
| compatible = "fixed-factor-clock"; |
| clocks = <&em01grpaclk>; |
| }; |
| }; |
| |
| soc { |
| clkin0: clkin0@5003c454 { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| reg = <0x5003c454 0x4>; |
| clock-frequency = <DT_FREQ_M(38)>; |
| }; |
| }; |
| }; |
| |
| &cmu { |
| interrupts = <46 0>; |
| }; |
| |
| &hfxo { |
| interrupts = <44 0>; |
| interrupt-names = "hfxo"; |
| }; |
| |
| &msc { |
| flash0: flash@0 { |
| compatible = "soc-nv-flash"; |
| write-block-size = <4>; |
| erase-block-size = <8192>; |
| reg = <0x0 DT_SIZE_K(512)>; |
| }; |
| }; |
| |
| &sram0 { |
| reg = <0x20000000 DT_SIZE_K(32)>; |
| }; |
| |
| &gpio { |
| interrupts = <10 2 18 2>; |
| clocks = <&cmu CLOCK_GPIO CLOCK_BRANCH_PCLK>; |
| }; |
| |
| &i2c0 { |
| interrupts = <27 0>; |
| clocks = <&cmu CLOCK_I2C0 CLOCK_BRANCH_LSPCLK>; |
| }; |
| |
| &i2c1 { |
| interrupts = <28 0>; |
| clocks = <&cmu CLOCK_I2C1 CLOCK_BRANCH_PCLK>; |
| }; |
| |
| &usart0 { |
| interrupts = <13 0>, <14 0>; |
| clocks = <&cmu CLOCK_USART0 CLOCK_BRANCH_PCLK>; |
| }; |
| |
| &usart1 { |
| interrupts = <15 0>, <16 0>; |
| clocks = <&cmu CLOCK_USART1 CLOCK_BRANCH_PCLK>; |
| }; |
| |
| &burtc0 { |
| interrupts = <18 0>; |
| clocks = <&cmu CLOCK_BURTC CLOCK_BRANCH_EM4GRPACLK>; |
| }; |
| |
| &rtcc0 { |
| interrupts = <12 0>; |
| interrupt-names = "rtcc"; |
| clocks = <&cmu CLOCK_RTCC CLOCK_BRANCH_RTCCCLK>; |
| }; |
| |
| &dcdc { |
| interrupts = <61 0>; |
| }; |