| /* |
| * Copyright (c) 2020 Kwon Tae-young <tykwon@m2i.co.kr> |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <st/f7/stm32f7.dtsi> |
| |
| / { |
| /* 64KB DTCM @ 20000000, 240KB SRAM1 @ 20010000, 16KB SRAM2 @ 2004C000 */ |
| |
| sram0: memory@20010000 { |
| compatible = "zephyr,memory-region", "mmio-sram"; |
| reg = <0x20010000 DT_SIZE_K(256)>; |
| zephyr,memory-region = "SRAM0"; |
| }; |
| |
| dtcm: memory@20000000 { |
| compatible = "zephyr,memory-region", "arm,dtcm"; |
| reg = <0x20000000 DT_SIZE_K(64)>; |
| zephyr,memory-region = "DTCM"; |
| }; |
| |
| soc { |
| compatible = "st,stm32f745", "st,stm32f7", "simple-bus"; |
| |
| pinctrl: pin-controller@40020000 { |
| reg = <0x40020000 0x2C00>; |
| |
| gpioj: gpio@40022400 { |
| compatible = "st,stm32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x40022400 0x400>; |
| clocks = <&rcc STM32_CLOCK(AHB1, 9U)>; |
| }; |
| |
| gpiok: gpio@40022800 { |
| compatible = "st,stm32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x40022800 0x400>; |
| clocks = <&rcc STM32_CLOCK(AHB1, 10U)>; |
| }; |
| }; |
| |
| i2c4: i2c@40006000 { |
| compatible = "st,stm32-i2c-v2"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40006000 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1, 24U)>; |
| interrupts = <95 0>, <96 0>; |
| interrupt-names = "event", "error"; |
| status = "disabled"; |
| }; |
| |
| spi6: spi@40015400 { |
| compatible = "st,stm32-spi-fifo", "st,stm32-spi"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x40015400 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB2, 21U)>; |
| interrupts = <86 5>; |
| status = "disabled"; |
| }; |
| |
| can2: can@40006800 { |
| compatible = "st,stm32-bxcan"; |
| reg = <0x40006800 0x400>; |
| interrupts = <63 0>, <64 0>, <65 0>, <66 0>; |
| interrupt-names = "TX", "RX0", "RX1", "SCE"; |
| clocks = <&rcc STM32_CLOCK(APB1, 26U)>; |
| status = "disabled"; |
| }; |
| |
| mac: ethernet@40028000 { |
| compatible = "st,stm32-ethernet"; |
| reg = <0x40028000 0x8000>; |
| interrupts = <61 0>; |
| clock-names = "stmmaceth", "mac-clk-tx", |
| "mac-clk-rx", "mac-clk-ptp"; |
| clocks = <&rcc STM32_CLOCK(AHB1, 25U)>, |
| <&rcc STM32_CLOCK(AHB1, 26U)>, |
| <&rcc STM32_CLOCK(AHB1, 27U)>, |
| <&rcc STM32_CLOCK(AHB1, 28U)>; |
| status = "disabled"; |
| }; |
| }; |
| |
| smbus4: smbus4 { |
| compatible = "st,stm32-smbus"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| i2c = <&i2c4>; |
| status = "disabled"; |
| }; |
| }; |
