dts/bindings/adc/atmel,sam0-adc.yaml

# Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
# SPDX-License-Identifier: Apache-2.0

description: Atmel SAM0 family ADC

compatible: "atmel,sam0-adc"

include:
  - name: adc-controller.yaml
  - name: pinctrl-device.yaml

properties:
  reg:
    required: true

  interrupts:
    required: true

  clocks:
    required: true

  clock-names:
    required: true

  gclk:
    type: int
    required: true
    description: generic clock generator source

  prescaler:
    type: int
    required: true
    description: clock prescaler divisor applied to the generic clock

  "#io-channel-cells":
    const: 1

  calib-offset:
    type: int
    description: |
      bit position offset in NVM SW Calib for start of ADC0 BIASCOMP field.
      This property is expected to be set on SAM{D,E}5x family of SoCs.
      For ADC0 this should be 0, and for ADC1 this should be 14.
    enum:
      - 0
      - 14

io-channel-cells:
  - input