| /* |
| * Copyright 2018 Foundries.io Ltd |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <dt-bindings/interrupt-controller/openisa-intmux.h> |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/i2c/i2c.h> |
| |
| / { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| aliases { |
| pcc-0 = &pcc0; |
| pcc-1 = &pcc1; |
| pinmux-a = &pinmux_a; |
| pinmux-b = &pinmux_b; |
| pinmux-c = &pinmux_c; |
| pinmux-d = &pinmux_d; |
| pinmux-e = &pinmux_e; |
| gpio-a = &gpioa; |
| gpio-b = &gpiob; |
| gpio-c = &gpioc; |
| gpio-d = &gpiod; |
| gpio-e = &gpioe; |
| uart-0 = &uart0; |
| uart-1 = &uart1; |
| uart-2 = &uart2; |
| uart-3 = &uart3; |
| i2c-0 = &i2c0; |
| i2c-1 = &i2c1; |
| i2c-2 = &i2c2; |
| i2c-3 = &i2c3; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| cpu@0 { |
| device_type = "cpu"; |
| compatible = "riscv"; |
| reg = <0>; |
| }; |
| |
| cpu@1 { |
| device_type = "cpu"; |
| compatible = "riscv"; |
| reg = <1>; |
| }; |
| }; |
| |
| m4_dtcm: memory@20000000 { |
| compatible = "mmio-sram"; |
| reg = <0x20000000 0x30000>; |
| }; |
| |
| m0_tcm: memory@9000000 { |
| compatible = "mmio-sram"; |
| reg = <0x09000000 0x20000>; |
| }; |
| |
| soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| compatible = "simple-bus"; |
| ranges; |
| |
| pcc0: clock-controller@4002b000 { |
| compatible = "openisa,rv32m1-pcc"; |
| reg = <0x4002b000 0x200>; |
| label = "PCC0"; |
| #clock-cells = <1>; |
| }; |
| |
| pcc1: clock-controller@41027000 { |
| compatible = "openisa,rv32m1-pcc"; |
| reg = <0x41027000 0x200>; |
| label = "PCC1"; |
| #clock-cells = <1>; |
| }; |
| |
| event0: interrupt-controller@e0041000 { |
| compatible = "openisa,rv32m1-event-unit"; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| reg = <0xe0041000 0x88>; |
| }; |
| |
| event1: interrupt-controller@4101f000 { |
| compatible = "openisa,rv32m1-event-unit"; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| reg = <0x4101f000 0x88>; |
| }; |
| |
| intmux0: interrupt-controller@4004f000 { |
| compatible = "openisa,rv32m1-intmux"; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| reg = <0x4004f000 0x20>; |
| clocks = <&pcc0 0x13c>; |
| label = "INTMUX0"; |
| status = "disabled"; |
| }; |
| |
| intmux1: interrupt-controller@41022000 { |
| compatible = "openisa,rv32m1-intmux"; |
| #interrupt-cells = <1>; |
| interrupt-controller; |
| reg = <0x41022000 0x20>; |
| clocks = <&pcc1 0x88>; |
| label = "INTMUX1"; |
| status = "disabled"; |
| }; |
| |
| lptmr0: timer@40032000 { |
| compatible = "openisa,rv32m1-lptmr"; |
| reg = <0x40032000 0x10>; |
| label = "LPTMR_0"; |
| }; |
| |
| lptmr1: timer@40033000 { |
| compatible = "openisa,rv32m1-lptmr"; |
| reg = <0x40033000 0x10>; |
| label = "LPTMR_1"; |
| }; |
| |
| lptmr2: timer@4102b000 { |
| compatible = "openisa,rv32m1-lptmr"; |
| reg = <0x4102b000 0x10>; |
| label = "LPTMR_2"; |
| }; |
| |
| pinmux_a: pinmux@40046000 { |
| compatible = "openisa,rv32m1-pinmux"; |
| reg = <0x40046000 0xd0>; |
| clocks = <&pcc0 0x118>; |
| }; |
| |
| pinmux_b: pinmux@40047000 { |
| compatible = "openisa,rv32m1-pinmux"; |
| reg = <0x40047000 0xd0>; |
| clocks = <&pcc0 0x11c>; |
| }; |
| |
| pinmux_c: pinmux@40048000 { |
| compatible = "openisa,rv32m1-pinmux"; |
| reg = <0x40048000 0xd0>; |
| clocks = <&pcc0 0x120>; |
| }; |
| |
| pinmux_d: pinmux@40049000 { |
| compatible = "openisa,rv32m1-pinmux"; |
| reg = <0x40049000 0xd0>; |
| clocks = <&pcc0 0x124>; |
| }; |
| |
| pinmux_e: pinmux@41037000 { |
| compatible = "openisa,rv32m1-pinmux"; |
| reg = <0x41037000 0xd0>; |
| clocks = <&pcc1 0xdc>; |
| }; |
| |
| gpioa: gpio@48020000 { |
| compatible = "openisa,rv32m1-gpio"; |
| reg = <0x48020000 0x14>; |
| label = "GPIO_0"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpiob: gpio@48020040 { |
| compatible = "openisa,rv32m1-gpio"; |
| reg = <0x48020040 0x14>; |
| label = "GPIO_1"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpioc: gpio@48020080 { |
| compatible = "openisa,rv32m1-gpio"; |
| reg = <0x48020080 0x14>; |
| label = "GPIO_2"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpiod: gpio@480200c0 { |
| compatible = "openisa,rv32m1-gpio"; |
| reg = <0x480200c0 0x14>; |
| label = "GPIO_3"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| gpioe: gpio@4100f000 { |
| compatible = "openisa,rv32m1-gpio"; |
| reg = <0x4100f000 0x14>; |
| label = "GPIO_4"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| clocks = <&pcc1 0x3c>; |
| }; |
| |
| uart0: lpuart@40042000 { |
| compatible = "openisa,rv32m1-lpuart"; |
| reg = <0x40042000 0x2c>; |
| clocks = <&pcc0 0x108>; |
| label = "UART_0"; |
| status = "disabled"; |
| }; |
| |
| uart1: lpuart@40043000 { |
| compatible = "openisa,rv32m1-lpuart"; |
| reg = <0x40043000 0x2c>; |
| clocks = <&pcc0 0x10c>; |
| label = "UART_1"; |
| status = "disabled"; |
| }; |
| |
| uart2: lpuart@40044000 { |
| compatible = "openisa,rv32m1-lpuart"; |
| reg = <0x40044000 0x2c>; |
| clocks = <&pcc0 0x110>; |
| label = "UART_2"; |
| status = "disabled"; |
| }; |
| |
| uart3: lpuart@41036000 { |
| compatible = "openisa,rv32m1-lpuart"; |
| reg = <0x41036000 0x2c>; |
| clocks = <&pcc0 0xd8>; |
| label = "UART_3"; |
| status = "disabled"; |
| }; |
| |
| i2c0: lpi2c@4003a000 { |
| compatible = "openisa,rv32m1-lpi2c"; |
| reg = <0x4003a000 0x170>; |
| clocks = <&pcc0 0xe8>; |
| label = "I2C_0"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c1: lpi2c@4003b000 { |
| compatible = "openisa,rv32m1-lpi2c"; |
| reg = <0x4003b000 0x170>; |
| clocks = <&pcc0 0xec>; |
| label = "I2C_1"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c2: lpi2c@4003c000 { |
| compatible = "openisa,rv32m1-lpi2c"; |
| reg = <0x4003c000 0x170>; |
| clocks = <&pcc0 0xf0>; |
| label = "I2C_2"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| i2c3: lpi2c@4102e000 { |
| compatible = "openisa,rv32m1-lpi2c"; |
| reg = <0x4102e000 0x170>; |
| clocks = <&pcc1 0xb8>; |
| label = "I2C_3"; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| |
| flash-controller@40023000 { |
| compatible = "openisa,rv32m1-ftfe"; |
| label = "FLASH_CTRL"; |
| reg = <0x40023000 0x18>; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| m4_flash: flash@0 { |
| compatible = "soc-nv-flash"; |
| label = "M4_FLASH"; |
| reg = <0 0x100000>; |
| erase-block-size = <4096>; |
| write-block-size = <8>; |
| }; |
| |
| m0_flash: flash@1000000 { |
| compatible = "soc-nv-flash"; |
| label = "M0_FLASH"; |
| reg = <0x01000000 0x40000>; |
| erase-block-size = <4096>; |
| write-block-size = <8>; |
| }; |
| }; |
| }; |
| }; |
