| # Copyright (c) 2021 Intel Corporation |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| # The Zephyr build from this defconfig is expected to boot from |
| # Intel Arm Trusted Firmware (ATF) |
| # Boot Flow: BL21 -> BL31 -> Zephyr |
| |
| CONFIG_SOC_SERIES_AGILEX=y |
| CONFIG_SOC_AGILEX=y |
| CONFIG_BOARD_INTEL_SOCFPGA_AGILEX_SOCDK=y |
| CONFIG_ARM_ARCH_TIMER=y |
| |
| # Serial Drivers |
| CONFIG_SERIAL=y |
| CONFIG_UART_NS16550=y |
| CONFIG_UART_INTERRUPT_DRIVEN=y |
| CONFIG_UART_NS16550_ACCESS_WORD_ONLY=y |
| |
| # Enable Console |
| CONFIG_CONSOLE=y |
| CONFIG_UART_CONSOLE=y |
| |
| # Enable Clock Manager |
| CONFIG_CLOCK_CONTROL=y |
| |
| # For Misc Register Map |
| CONFIG_SYSCON=y |
