boards/xtensa/esp32/esp32-pinctrl.dtsi

/*
 * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32-gpio-sigmap.h>

&pinctrl {

	uart0_tx_gpio1: uart0_tx_gpio1 {
		pinmux = <UART0_TX_GPIO1>;
	};

	uart0_rx_gpio3: uart0_rx_gpio3 {
		pinmux = <UART0_RX_GPIO3>;
		bias-pull-up;
	};

	uart1_tx_gpio10: uart1_tx_gpio10 {
		pinmux = <UART1_TX_GPIO10>;
	};

	uart1_rx_gpio9: uart1_rx_gpio9 {
		pinmux = <UART1_RX_GPIO9>;
		bias-pull-up;
	};

	uart2_tx_gpio17: uart2_tx_gpio17 {
		pinmux = <UART2_TX_GPIO17>;
	};

	uart2_rx_gpio16: uart2_rx_gpio16 {
		pinmux = <UART2_RX_GPIO16>;
		bias-pull-up;
	};

	spim2_miso_gpio12: spim2_miso_gpio12 {
		pinmux = <SPIM2_MISO_GPIO12>;
	};

	spim2_mosi_gpio13: spim2_mosi_gpio13 {
		pinmux = <SPIM2_MOSI_GPIO13>;
		output-low;
	};

	spim2_sclk_gpio14: spim2_sclk_gpio14 {
		pinmux = <SPIM2_SCLK_GPIO14>;
	};

	spim2_csel_gpio15: spim2_csel_gpio15 {
		pinmux = <SPIM2_CSEL_GPIO15>;
	};

	spim3_miso_gpio19: spim3_miso_gpio19 {
		pinmux = <SPIM3_MISO_GPIO19>;
	};

	spim3_mosi_gpio23: spim3_mosi_gpio23 {
		pinmux = <SPIM3_MOSI_GPIO23>;
		output-low;
	};

	spim3_sclk_gpio18: spim3_sclk_gpio18 {
		pinmux = <SPIM3_SCLK_GPIO18>;
	};

	spim3_csel_gpio5: spim3_csel_gpio5 {
		pinmux = <SPIM3_CSEL_GPIO5>;
	};

	i2c0_sda_gpio21: i2c0_sda_gpio21 {
		pinmux = <I2C0_SDA_GPIO21>;
		bias-pull-up;
		drive-open-drain;
		output-high;
	};

	i2c0_scl_gpio22: i2c0_scl_gpio22 {
		pinmux = <I2C0_SCL_GPIO22>;
		bias-pull-up;
		drive-open-drain;
		output-high;
	};

};