| commit | 250041f4c81eba31ec4a9b0b1b74e9997c7f507f | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Tue Dec 03 09:52:02 2019 -0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Wed Dec 18 20:24:18 2019 -0500 |
| tree | ba498f0b6a7afe04f86fba5587dbefe040ce4fd1 | |
| parent | 01167291146753da904fa27406e8fcd6125578f5 [diff] |
west.yml: add hal_xtensa as a module This adds hal_xtensa as a module. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
diff --git a/west.yml b/west.yml index 732711d..b638ab7 100644 --- a/west.yml +++ b/west.yml
@@ -109,6 +109,9 @@ - name: nrf_hw_models path: modules/bsim_hw_models/nrf_hw_models revision: fec69703cb1ca06fcdab6d5fde01274f0fc5c759 + - name: hal_xtensa + revision: 382b309b481adc85dd517d50b8a458bcb86f15d4 + path: modules/hal/xtensa self: path: zephyr