blob: 25295432874a7fd85f9e221434483512ea9514da [file] [log] [blame]
# Copyright 2021,2023 NXP
# SPDX-License-Identifier: Apache-2.0
description: NXP mcux SAI-I2S controller
compatible: "nxp,mcux-i2s"
include: [i2s-controller.yaml, pinctrl-device.yaml]
properties:
reg:
required: true
interrupts:
required: true
dma-names:
required: true
nxp,tx-dma-channel:
type: int
required: true
description: tx dma channel number
nxp,rx-dma-channel:
type: int
required: true
description: rx dma channel number
nxp,tx-sync-mode:
type: boolean
description: tx sync mode
nxp,rx-sync-mode:
type: boolean
description: rx sync mode
pre-div:
type: int
description: pre divider
podf:
type: int
description: post-divider fraction
pll-clocks:
type: phandle-array
description: pll settings
specifier-space: pll-clock
pll-clock-names:
type: string-array
description: Provided names of pll-clock specifiers
pinmuxes:
type: phandle-array
specifier-space: pinmux
description: iomux settings
nxp,tx-channel:
type: int
description: tx channel the maximum number is SOC dependent
clock-mux:
required: true
type: int
description: Clock mux source for SAI root clock