blob: 169fe06086bcde15059bea40c360f7968e362d1a [file] [log] [blame]
/*
* Copyright (c) 2017 I-SENSE group of ICCS
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/stm32f3-pinctrl.dtsi>
#include <arm/armv7-m.dtsi>
#include <st/mem.h>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m4f";
reg = <0>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0x20000000 DT_SRAM_SIZE>;
};
soc {
flash-controller@40022000 {
compatible = "st,stm32f3-flash-controller";
label = "FLASH_CTRL";
reg = <0x40022000 0x400>;
interrupts = <4 0>;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@8000000 {
compatible = "soc-nv-flash";
label = "FLASH_STM32";
reg = <0x08000000 DT_FLASH_SIZE>;
};
};
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clocks-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
pinctrl: pin-controller {
compatible = "st,stm32-pinmux";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x48000000 0x1800>;
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00004000>;
interrupts = <37 0>;
status = "disabled";
label = "UART_1";
};
usart2: serial@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
interrupts = <38 0>;
status = "disabled";
label = "UART_2";
};
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};
i2c1: i2c@40005400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
interrupts = <31 0>, <32 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_1";
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
interrupts = <35 5>;
status = "disabled";
label = "SPI_1";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};