dts/xtensa/intel/intel_cavs.dtsi

/*
 * Copyright (c) 2022 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <xtensa/xtensa.dtsi>

/ {
	soc {
		lpgpdma0: dma@7c000 {
			compatible = "intel,cavs-gpdma";
			#dma-cells = <1>;
			reg = <0x0007c000 0x1000>;
			shim = <0x00078400 0x100>;
			interrupts = <0x10 0 0>;
			interrupt-parent = <&cavs3>;
			label = "DMA_0";

			status = "okay";
		};

		lpgpdma1: dma@7d000 {
			compatible = "intel,cavs-gpdma";
			#dma-cells = <1>;
			reg = <0x0007d000 0x1000>;
			shim = <0x00078500 0x100>;
			interrupts = <0x0F 0 0>;
			interrupt-parent = <&cavs3>;
			label = "DMA_1";

			status = "okay";
		};

		hda_host_out: dma@72800 {
			compatible = "intel,cavs-hda-host-out";
			#dma-cells = <1>;
			reg = <0x00072800 0x40>;
			dma-channels = <7>;
			label = "HDA_HOST_OUT";

			status = "okay";
		};

		hda_host_in: dma@72c00 {
			compatible = "intel,cavs-hda-host-in";
			#dma-cells = <1>;
			reg = <0x00072c00 0x40>;
			dma-channels = <7>;
			label = "HDA_HOST_IN";

			status = "okay";
		};
	};
};