blob: 4efbb2a00a57d0400cc4adc13d29b562fdcfcb56 [file] [log] [blame]
/* SoC level DTS fixup file */
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40013800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40013800_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40013800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_1_NAME ST_STM32_USART_40013800_LABEL
#define PORT_1_IRQ ST_STM32_USART_40013800_IRQ_0
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_2_NAME ST_STM32_USART_40004400_LABEL
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0
#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS ST_STM32_USART_40004800_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_3_BAUD_RATE ST_STM32_USART_40004800_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_3_IRQ_PRI ST_STM32_USART_40004800_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_3_NAME ST_STM32_USART_40004800_LABEL
#define PORT_3_IRQ ST_STM32_USART_40004800_IRQ_0
#define CONFIG_UART_STM32_PORT_4_BASE_ADDRESS ST_STM32_USART_40004C00_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_4_BAUD_RATE ST_STM32_USART_40004C00_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_4_IRQ_PRI ST_STM32_USART_40004C00_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_4_NAME ST_STM32_USART_40004C00_LABEL
#define PORT_4_IRQ ST_STM32_USART_40004C00_IRQ_0
#define CONFIG_UART_STM32_PORT_5_BASE_ADDRESS ST_STM32_USART_40005000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_5_BAUD_RATE ST_STM32_USART_40005000_CURRENT_SPEED
#define CONFIG_UART_STM32_PORT_5_IRQ_PRI ST_STM32_USART_40005000_IRQ_0_PRIORITY
#define CONFIG_UART_STM32_PORT_5_NAME ST_STM32_USART_40005000_LABEL
#define PORT_5_IRQ ST_STM32_USART_40005000_IRQ_0
#define CONFIG_I2C_1_BASE_ADDRESS ST_STM32_I2C_V2_40005400_BASE_ADDRESS
#define CONFIG_I2C_1_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_1_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME ST_STM32_I2C_V2_40005400_LABEL
#define CONFIG_I2C_1_EVENT_IRQ ST_STM32_I2C_V2_40005400_IRQ_EVENT
#define CONFIG_I2C_1_ERROR_IRQ ST_STM32_I2C_V2_40005400_IRQ_ERROR
#define CONFIG_I2C_1_BITRATE ST_STM32_I2C_V2_40005400_CLOCK_FREQUENCY
#define CONFIG_I2C_2_BASE_ADDRESS ST_STM32_I2C_V2_40005800_BASE_ADDRESS
#define CONFIG_I2C_2_EVENT_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_2_ERROR_IRQ_PRI ST_STM32_I2C_V2_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME ST_STM32_I2C_V2_40005800_LABEL
#define CONFIG_I2C_2_EVENT_IRQ ST_STM32_I2C_V2_40005800_IRQ_EVENT
#define CONFIG_I2C_2_ERROR_IRQ ST_STM32_I2C_V2_40005800_IRQ_ERROR
#define CONFIG_I2C_2_BITRATE ST_STM32_I2C_V2_40005800_CLOCK_FREQUENCY
#define CONFIG_I2C_4_BASE_ADDRESS ST_STM32_I2C_V2_40008400_BASE_ADDRESS
#define CONFIG_I2C_4_EVENT_IRQ_PRI ST_STM32_I2C_V2_40008400_IRQ_EVENT_PRIORITY
#define CONFIG_I2C_4_ERROR_IRQ_PRI ST_STM32_I2C_V2_40008400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_4_NAME ST_STM32_I2C_V2_40008400_LABEL
#define CONFIG_I2C_4_EVENT_IRQ ST_STM32_I2C_V2_40008400_IRQ_EVENT
#define CONFIG_I2C_4_ERROR_IRQ ST_STM32_I2C_V2_40008400_IRQ_ERROR
#define CONFIG_I2C_4_BITRATE ST_STM32_I2C_V2_40008400_CLOCK_FREQUENCY
#define CONFIG_SPI_1_BASE_ADDRESS ST_STM32_SPI_FIFO_40013000_BASE_ADDRESS
#define CONFIG_SPI_1_IRQ_PRI ST_STM32_SPI_FIFO_40013000_IRQ_0_PRIORITY
#define CONFIG_SPI_1_NAME ST_STM32_SPI_FIFO_40013000_LABEL
#define CONFIG_SPI_1_IRQ ST_STM32_SPI_FIFO_40013000_IRQ_0
#define CONFIG_SPI_2_BASE_ADDRESS ST_STM32_SPI_FIFO_40003800_BASE_ADDRESS
#define CONFIG_SPI_2_IRQ_PRI ST_STM32_SPI_FIFO_40003800_IRQ_0_PRIORITY
#define CONFIG_SPI_2_NAME ST_STM32_SPI_FIFO_40003800_LABEL
#define CONFIG_SPI_2_IRQ ST_STM32_SPI_FIFO_40003800_IRQ_0
#define CONFIG_SPI_3_BASE_ADDRESS ST_STM32_SPI_FIFO_40003C00_BASE_ADDRESS
#define CONFIG_SPI_3_IRQ_PRI ST_STM32_SPI_FIFO_40003C00_IRQ_0_PRIORITY
#define CONFIG_SPI_3_NAME ST_STM32_SPI_FIFO_40003C00_LABEL
#define CONFIG_SPI_3_IRQ ST_STM32_SPI_FIFO_40003C00_IRQ_0
#define FLASH_DEV_BASE_ADDRESS ST_STM32L4_FLASH_CONTROLLER_40022000_BASE_ADDRESS
#define FLASH_DEV_NAME ST_STM32L4_FLASH_CONTROLLER_40022000_LABEL
#define CONFIG_USB_BASE_ADDRESS ST_STM32_OTGFS_50000000_BASE_ADDRESS
#define CONFIG_USB_IRQ ST_STM32_OTGFS_50000000_IRQ_OTGFS
#define CONFIG_USB_IRQ_PRI ST_STM32_OTGFS_50000000_IRQ_OTGFS_PRIORITY
#define CONFIG_USB_NUM_BIDIR_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_BIDIR_ENDPOINTS
#define CONFIG_USB_NUM_IN_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_IN_ENDPOINTS
#define CONFIG_USB_NUM_OUT_ENDPOINTS ST_STM32_OTGFS_50000000_NUM_OUT_ENDPOINTS
#define CONFIG_USB_RAM_SIZE ST_STM32_OTGFS_50000000_RAM_SIZE
/* End of SoC Level DTS fixup file */