commit 2fed22c26a7c2b5fb8c9398a04f00f1104f61909
author Jose Alberto Meza <jose.a.meza.arellano@intel.com> Thu May 12 12:34:22 2022 -0700
committer Carles Cufí <carles.cufi@nordicsemi.no> Mon Jul 04 16:18:42 2022 +0200
tree 951825ee2ef51792aa4674709cdc3e4a277c17ab
parent b6d2f22bd4de73e292574431acee058aac46c60c

boards: arm: mec172xevb: Update SPI HW block properties

Reflect device tree field name.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>

boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts

diff --git a/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts b/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts
index 20989a2..2e99980 100644
--- a/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts
+++ b/boards/arm/mec172xevb_assy6906/mec172xevb_assy6906.dts
@@ -210,8 +210,8 @@
 	status = "okay";
 	clock-frequency = <4000000>;
 	lines = <4>;
-	chip-select = <0>;
-	port-sel = <0>; /* Shared SPI */
+	chip_select = <0>;
+	port_sel = <0>; /* Shared SPI */
 
 	pinctrl-0 = < &shd_cs0_n_gpio055
 		      &shd_clk_gpio056