| /* |
| * Copyright 2024 Arm Limited and/or its affiliates <open-source-office@arm.com> |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /* /dts-v1/; */ |
| |
| #include <arm/armv8.1-m.dtsi> |
| #include <zephyr/dt-bindings/i2c/i2c.h> |
| #include <zephyr/dt-bindings/input/input-event-codes.h> |
| #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> |
| #include <mem.h> |
| |
| / { |
| aliases { |
| led0 = &led_0; |
| led1 = &led_1; |
| sw0 = &user_button_0; |
| sw1 = &user_button_1; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| led_0: led_0 { |
| gpios = <&gpio_led0 0>; |
| label = "USERLED0"; |
| }; |
| led_1: led_1 { |
| gpios = <&gpio_led0 1>; |
| label = "USERLED1"; |
| }; |
| led_2: led_2 { |
| gpios = <&gpio_led0 2>; |
| label = "USERLED2"; |
| }; |
| led_3: led_3 { |
| gpios = <&gpio_led0 3>; |
| label = "USERLED3"; |
| }; |
| led_4: led_4 { |
| gpios = <&gpio_led0 4>; |
| label = "USERLED4"; |
| }; |
| led_5: led_5 { |
| gpios = <&gpio_led0 5>; |
| label = "USERLED5"; |
| }; |
| led_6: led_6 { |
| gpios = <&gpio_led0 6>; |
| label = "USERLED6"; |
| }; |
| led_7: led_7 { |
| gpios = <&gpio_led0 7>; |
| label = "USERLED7"; |
| }; |
| led_8: led_8 { |
| gpios = <&gpio_led0 8>; |
| label = "PB1LED"; |
| }; |
| led_9: led_9 { |
| gpios = <&gpio_led0 9>; |
| label = "PB2LED"; |
| }; |
| }; |
| |
| gpio_keys { |
| compatible = "gpio-keys"; |
| user_button_0: button_0 { |
| label = "USERPB0"; |
| gpios = <&gpio_button 0>; |
| zephyr,code = <INPUT_KEY_0>; |
| }; |
| user_button_1: button_1 { |
| label = "USERPB1"; |
| gpios = <&gpio_button 1>; |
| zephyr,code = <INPUT_KEY_1>; |
| }; |
| }; |
| |
| null_ptr_detect: null_ptr_detect@0 { |
| compatible = "zephyr,memory-region"; |
| /* 0 - CONFIG_CORTEX_M_NULL_POINTER_EXCEPTION_PAGE_SIZE> */ |
| reg = <0x0 0x400>; |
| zephyr,memory-region = "NULL_PTR_DETECT"; |
| zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_FLASH) )>; |
| }; |
| /* DDR4 - 2G, alternates non-secure/secure every 256M */ |
| ddr4: memory@60000000 { |
| device_type = "memory"; |
| compatible = "zephyr,memory-region"; |
| reg = <0x60000000 DT_SIZE_M(256) |
| 0x70000000 DT_SIZE_M(256) |
| 0x80000000 DT_SIZE_M(256) |
| 0x90000000 DT_SIZE_M(256) |
| 0xa0000000 DT_SIZE_M(256) |
| 0xb0000000 DT_SIZE_M(256) |
| 0xc0000000 DT_SIZE_M(256) |
| 0xd0000000 DT_SIZE_M(256)>; |
| zephyr,memory-region = "DDR4"; |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <3>; |
| }; |