| /* |
| * Copyright (c) 2022, NXP |
| * SPDX-License-Identifier: Apache-2.0 |
| * |
| * Note: File generated by gen_board_pinctrl.py |
| * from mimxrt1170_evk.mex |
| */ |
| |
| #include <nxp/nxp_imx/rt/mimxrt1176dvmaa-pinctrl.dtsi> |
| |
| &pinctrl { |
| /* conflicts with fxos8700 sensor */ |
| pinmux_csi: pinmux_csi { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b2_14_gpio11_io15>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_26_gpio9_io25>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpi2c6: pinmux_lpi2c6 { |
| group0 { |
| pinmux = <&iomuxc_lpsr_gpio_lpsr_07_lpi2c6_scl>, |
| <&iomuxc_lpsr_gpio_lpsr_06_lpi2c6_sda>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| }; |
| |
| pinmux_enet: pinmux_enet { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_12_gpio9_io11>, |
| <&iomuxc_gpio_disp_b2_08_enet_rx_en>, |
| <&iomuxc_gpio_disp_b2_09_enet_rx_er>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_disp_b2_06_enet_rdata00>, |
| <&iomuxc_gpio_disp_b2_07_enet_rdata01>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| group2 { |
| pinmux = <&iomuxc_lpsr_gpio_lpsr_12_gpio12_io12>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| group3 { |
| pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>, |
| <&iomuxc_gpio_disp_b2_03_enet_tdata01>, |
| <&iomuxc_gpio_disp_b2_04_enet_tx_en>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| group4 { |
| pinmux = <&iomuxc_gpio_disp_b2_05_enet_ref_clk>; |
| drive-strength = "high"; |
| slew-rate = "slow"; |
| input-enable; |
| }; |
| }; |
| |
| pinmux_enet_mdio: pinmux_enet_mdio { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_32_enet_mdc>, |
| <&iomuxc_gpio_ad_33_enet_mdio>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_ptp: pinmux_ptp { |
| }; |
| |
| pinmux_enet1g: pinmux_enet1g { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b1_11_enet_1g_tx_clk_io>, // ENET_RGMII_TXC |
| <&iomuxc_gpio_disp_b1_01_enet_1g_rx_clk>; // ENET_RGMII_RXC |
| bias-disable; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_disp_b1_09_enet_1g_tdata00>, // ENET_RGMII_TXD0 |
| <&iomuxc_gpio_disp_b1_08_enet_1g_tdata01>, // ENET_RGMII_TXD1 |
| <&iomuxc_gpio_disp_b1_07_enet_1g_tdata02>, // ENET_RGMII_TXD2 |
| <&iomuxc_gpio_disp_b1_06_enet_1g_tdata03>, // ENET_RGMII_TXD3 |
| <&iomuxc_gpio_disp_b1_10_enet_1g_tx_en>; // ENET_RGMII_TX_EN |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| group2 { |
| pinmux = <&iomuxc_gpio_disp_b1_02_enet_1g_rdata00>, // ENET_RGMII_RXD0 |
| <&iomuxc_gpio_disp_b1_03_enet_1g_rdata01>, // ENET_RGMII_RXD1 |
| <&iomuxc_gpio_disp_b1_04_enet_1g_rdata02>, // ENET_RGMII_RXD2 |
| <&iomuxc_gpio_disp_b1_05_enet_1g_rdata03>, // ENET_RGMII_RXD3 |
| <&iomuxc_gpio_disp_b1_00_enet_1g_rx_en>; // ENET_RGMII_RX_EN |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| }; |
| |
| pinmux_enet1g_mdio: pinmux_enet1g_mdio { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b2_13_gpio11_io14>; // ETHPHY_RST_B |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "slow"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_disp_b2_12_gpio_mux5_io13>; // RGMII1_PHY_INTB |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| group2 { |
| pinmux = <&iomuxc_gpio_emc_b2_19_enet_1g_mdc>, // ENET_RGMII_MDC |
| <&iomuxc_gpio_emc_b2_20_enet_1g_mdio>; // ENET_RGMII_MDIO |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_enet1g_ptp: pinmux_enet1g_ptp { |
| }; |
| |
| pinmux_flexcan3: pinmux_flexcan3 { |
| group0 { |
| pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>, |
| <&iomuxc_lpsr_gpio_lpsr_00_can3_tx>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_flexpwm1: pinmux_flexpwm1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_04_flexpwm1_pwm2_a>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_flexspi1: pinmux_flexspi1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_a_dqs>, |
| <&iomuxc_gpio_sd_b2_06_flexspi1_a_ss0_b>, |
| <&iomuxc_gpio_sd_b2_07_flexspi1_a_sclk>, |
| <&iomuxc_gpio_sd_b2_08_flexspi1_a_data00>, |
| <&iomuxc_gpio_sd_b2_09_flexspi1_a_data01>, |
| <&iomuxc_gpio_sd_b2_10_flexspi1_a_data02>, |
| <&iomuxc_gpio_sd_b2_11_flexspi1_a_data03>; |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| |
| /* interrupt gpios for fxos8700 */ |
| pinmux_fxos8700_int: pinmux_fxos8700_int { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b2_14_gpio11_io15>, |
| <&iomuxc_gpio_disp_b2_13_gpio11_io14>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| /* conflicts with lpspi1 */ |
| pinmux_lcdif: pinmux_lcdif { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_30_gpio9_io29>, |
| <&iomuxc_gpio_ad_02_gpio9_io01>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_disp_b2_15_gpio11_io16>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpadc0: pinmux_lpadc0 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_06_adc1_ch0a>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpi2c1: pinmux_lpi2c1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_08_lpi2c1_scl>, |
| <&iomuxc_gpio_ad_09_lpi2c1_sda>; |
| drive-strength = "normal"; |
| drive-open-drain; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| }; |
| |
| /* Connected to FXOS8700 */ |
| pinmux_lpi2c5: pinmux_lpi2c5 { |
| group0 { |
| pinmux = <&iomuxc_lpsr_gpio_lpsr_05_lpi2c5_scl>, |
| <&iomuxc_lpsr_gpio_lpsr_04_lpi2c5_sda>; |
| drive-strength = "normal"; |
| drive-open-drain; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| }; |
| |
| pinmux_lpspi1: pinmux_lpspi1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_29_lpspi1_pcs0>, |
| <&iomuxc_gpio_ad_28_lpspi1_sck>, |
| <&iomuxc_gpio_ad_31_lpspi1_sdi>, |
| <&iomuxc_gpio_ad_30_lpspi1_sdo>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpuart1: pinmux_lpuart1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_25_lpuart1_rx>, |
| <&iomuxc_gpio_ad_24_lpuart1_tx>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpuart1_sleep: pinmux_lpuart1_sleep { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_25_gpio_mux3_io24>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_24_lpuart1_tx>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpuart2: pinmux_lpuart2 { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b2_11_lpuart2_rx>, |
| <&iomuxc_gpio_disp_b2_10_lpuart2_tx>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpuart2_sleep: pinmux_lpuart2_sleep { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b2_11_gpio_mux5_io12>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_disp_b2_10_lpuart2_tx>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_lpuart2_flowcontrol: pinmux_lpuart2_flowcontrol { |
| group0 { |
| pinmux = <&iomuxc_gpio_disp_b2_11_lpuart2_rx>, |
| <&iomuxc_gpio_disp_b2_10_lpuart2_tx>, |
| <&iomuxc_gpio_disp_b2_12_lpuart2_cts_b>, |
| <&iomuxc_gpio_disp_b2_13_lpuart2_rts_b>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| pinmux_sai1: pinmux_sai1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_17_sai1_mclk>, |
| <&iomuxc_gpio_ad_18_sai1_rx_sync>, |
| <&iomuxc_gpio_ad_19_sai1_rx_bclk>, |
| <&iomuxc_gpio_ad_20_sai1_rx_data00>, |
| <&iomuxc_gpio_ad_21_sai1_tx_data00>, |
| <&iomuxc_gpio_ad_22_sai1_tx_bclk>, |
| <&iomuxc_gpio_ad_23_sai1_tx_sync>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| }; |
| |
| pinmux_sai4: pinmux_sai4 { |
| group0 { |
| pinmux = <&iomuxc_lpsr_gpio_lpsr_09_sai4_tx_data>, |
| <&iomuxc_lpsr_gpio_lpsr_10_sai4_tx_sync>, |
| <&iomuxc_lpsr_gpio_lpsr_12_sai4_tx_bclk>; |
| drive-strength = "high"; |
| slew-rate = "fast"; |
| input-enable; |
| }; |
| }; |
| |
| /* conflicts with enet pins */ |
| pinmux_usdhc1: pinmux_usdhc1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>, |
| <&iomuxc_gpio_sd_b1_01_usdhc1_clk>, |
| <&iomuxc_gpio_sd_b1_02_usdhc1_data0>, |
| <&iomuxc_gpio_sd_b1_03_usdhc1_data1>, |
| <&iomuxc_gpio_sd_b1_04_usdhc1_data2>, |
| <&iomuxc_gpio_sd_b1_05_usdhc1_data3>; |
| bias-pull-up; |
| input-enable; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_34_usdhc1_vselect>, |
| <&iomuxc_gpio_ad_32_gpio_mux3_io31_cm7>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| group2 { |
| pinmux = <&iomuxc_gpio_ad_35_gpio10_io02>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| /* removes pull on dat3 for card detect */ |
| pinmux_usdhc1_dat3_nopull: pinmux_usdhc1_dat3_nopull { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b1_05_usdhc1_data3>; |
| bias-disable; |
| input-enable; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>, |
| <&iomuxc_gpio_sd_b1_01_usdhc1_clk>, |
| <&iomuxc_gpio_sd_b1_02_usdhc1_data0>, |
| <&iomuxc_gpio_sd_b1_03_usdhc1_data1>, |
| <&iomuxc_gpio_sd_b1_04_usdhc1_data2>; |
| bias-pull-up; |
| input-enable; |
| }; |
| group2 { |
| pinmux = <&iomuxc_gpio_ad_34_usdhc1_vselect>, |
| <&iomuxc_gpio_ad_32_gpio_mux3_io31_cm7>; |
| drive-strength = "high"; |
| bias-pull-down; |
| slew-rate = "fast"; |
| }; |
| group3 { |
| pinmux = <&iomuxc_gpio_ad_35_gpio10_io02>; |
| drive-strength = "high"; |
| bias-pull-up; |
| slew-rate = "fast"; |
| }; |
| }; |
| |
| }; |
| |