| /* |
| * Copyright (c) 2018-2020 Nordic Semiconductor ASA |
| * Copyright (c) 2020 Circuit Dojo LLC |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| #include "circuitdojo_feather_nrf9160_common-pinctrl.dtsi" |
| |
| / { |
| model = "Circuit Dojo nRF9160 Feather"; |
| compatible = "circuitdojo,feather-nrf9160"; |
| |
| chosen { |
| zephyr,console = &uart0; |
| zephyr,shell-uart = &uart0; |
| zephyr,uart-mcumgr = &uart0; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| blue_led: led_0 { |
| gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; |
| label = "Blue LED (D7)"; |
| }; |
| }; |
| |
| pwmleds { |
| compatible = "pwm-leds"; |
| pwm_led0: pwm_led_0 { |
| pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>; |
| }; |
| }; |
| |
| buttons { |
| compatible = "gpio-keys"; |
| button0: button_0 { |
| gpios = <&gpio0 12 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; |
| label = "Switch 1"; |
| }; |
| }; |
| |
| /* These aliases are provided for compatibility with samples */ |
| aliases { |
| led0 = &blue_led; |
| bootloader-led0 = &blue_led; |
| pwm-led0 = &pwm_led0; |
| sw0 = &button0; |
| mcuboot-button0 = &button0; |
| mcuboot-led0 = &blue_led; |
| watchdog0 = &wdt0; |
| spi-flash0 = &w25q32jv; |
| accel0 = &lis2dh; |
| }; |
| |
| /* Used for accessing other pins */ |
| feather_header: feather_connector { |
| compatible = "adafruit-feather-header"; |
| #gpio-cells = <2>; |
| gpio-map-mask = <0xffffffff 0xffffffc0>; |
| gpio-map-pass-thru = <0 0x3f>; |
| gpio-map = <12 0 &gpio0 26 0>, /* SDA */ |
| <13 0 &gpio0 27 0>, /* SCL */ |
| <14 0 &gpio0 29 0>, /* PWM3 */ |
| <15 0 &gpio0 30 0>, /* PWM3 */ |
| <16 0 &gpio0 0 0>, /* PWM1 */ |
| <17 0 &gpio0 1 0>, /* PWM1 */ |
| <18 0 &gpio0 2 0>, /* PWM1 */ |
| <19 0 &gpio0 3 0>, /* PWM0 */ |
| <20 0 &gpio0 4 0>, /* PWM1 */ |
| /* 11 not connected */ |
| <10 0 &gpio0 24 0>, /* TX */ |
| <9 0 &gpio0 23 0>, /* RX */ |
| <8 0 &gpio0 22 0>, /* MISO */ |
| <7 0 &gpio0 21 0>, /* MOSI */ |
| <6 0 &gpio0 19 0>, /* SCK */ |
| <5 0 &gpio0 18 0>, /* SS */ |
| <4 0 &gpio0 17 0>, /* ADC4 = AIN6 */ |
| <3 0 &gpio0 16 0>, /* ADC3 = AIN5 */ |
| <2 0 &gpio0 15 0>, /* ADC2 = AIN4 */ |
| <1 0 &gpio0 14 0>, /* ADC1 = AIN2 */ |
| <0 0 &gpio0 13 0>; /* ADC0 = AIN1 */ |
| }; |
| |
| nrf-ps-en { |
| compatible = "regulator-fixed-sync", "regulator-fixed"; |
| regulator-name = "nrf_ps_en"; |
| enable-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; |
| regulator-boot-on; |
| }; |
| }; |
| |
| &adc { |
| status = "okay"; |
| }; |
| |
| &gpiote { |
| status = "okay"; |
| }; |
| |
| &gpio0 { |
| status = "okay"; |
| }; |
| |
| &uart0 { |
| status = "okay"; |
| current-speed = <115200>; |
| pinctrl-0 = <&uart0_default>; |
| pinctrl-1 = <&uart0_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &uart1 { |
| current-speed = <115200>; |
| pinctrl-0 = <&uart1_default>; |
| pinctrl-1 = <&uart1_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &uart2 { |
| pinctrl-0 = <&uart2_default>; |
| pinctrl-1 = <&uart2_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &i2c1 { |
| compatible = "nordic,nrf-twim"; |
| status = "okay"; |
| |
| pinctrl-0 = <&i2c1_default>; |
| pinctrl-1 = <&i2c1_sleep>; |
| pinctrl-names = "default", "sleep"; |
| pcf85063a@51 { |
| compatible = "nxp,pcf85063a"; |
| reg = <0x51>; |
| }; |
| |
| lis2dh: lis2dh@18 { |
| compatible = "st,lis2dh"; |
| reg = <0x18>; |
| irq-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>; |
| disconnect-sdo-sa0-pull-up; |
| }; |
| |
| }; |
| |
| &pwm0 { |
| status = "okay"; |
| pinctrl-0 = <&pwm0_default>; |
| pinctrl-1 = <&pwm0_sleep>; |
| pinctrl-names = "default", "sleep"; |
| }; |
| |
| &spi3 { |
| compatible = "nordic,nrf-spim"; |
| status = "okay"; |
| cs-gpios = < &gpio0 7 GPIO_ACTIVE_LOW >; |
| pinctrl-0 = <&spi3_default>; |
| pinctrl-1 = <&spi3_sleep>; |
| pinctrl-names = "default", "sleep"; |
| w25q32jv: w25q32jv@0 { |
| compatible = "jedec,spi-nor"; |
| reg = < 0 >; |
| spi-max-frequency = < 40000000 >; |
| wp-gpios = < &gpio0 8 GPIO_ACTIVE_LOW >; |
| hold-gpios = < &gpio0 10 GPIO_ACTIVE_LOW >; |
| size = < 0x2000000 >; |
| has-dpd; |
| t-enter-dpd = < 3000 >; |
| t-exit-dpd = < 30000 >; |
| jedec-id = [ ef 40 16 ]; |
| }; |
| }; |
| |
| &timer0 { |
| status = "okay"; |
| }; |
| |
| &timer1 { |
| status = "okay"; |
| }; |
| |
| &timer2 { |
| status = "okay"; |
| }; |
| |
| &flash0 { |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| boot_partition: partition@0 { |
| label = "mcuboot"; |
| reg = <0x00000000 0x10000>; |
| }; |
| slot0_partition: partition@10000 { |
| label = "image-0"; |
| }; |
| slot0_ns_partition: partition@40000 { |
| label = "image-0-nonsecure"; |
| }; |
| slot1_partition: partition@80000 { |
| label = "image-1"; |
| }; |
| slot1_ns_partition: partition@b0000 { |
| label = "image-1-nonsecure"; |
| }; |
| scratch_partition: partition@f0000 { |
| label = "image-scratch"; |
| reg = <0x000f0000 0xa000>; |
| }; |
| storage_partition: partition@fa000 { |
| label = "storage"; |
| reg = <0x000fa000 0x00006000>; |
| }; |
| }; |
| }; |
| |
| / { |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| sram0_s: image_s@20000000 { |
| /* Secure image memory */ |
| }; |
| |
| sram0_bsd: image_bsd@20010000 { |
| /* BSD (shared) memory */ |
| }; |
| |
| sram0_ns: image_ns@20020000 { |
| /* Non-Secure image memory */ |
| }; |
| }; |
| }; |
| |
| / { |
| vbatt { |
| compatible = "voltage-divider"; |
| io-channels = <&adc 7>; |
| output-ohms = <100000>; |
| full-ohms = <(100000 + 100000)>; |
| power-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>; |
| }; |
| }; |
| |
| /* Include partition configuration file */ |
| #include "circuitdojo_feather_nrf9160_partition_conf.dts" |