blob: dca80d2d2e12e020f453a7a204e39cc81e437772 [file] [log] [blame]
/*
* Copyright (c) 2017 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/intel-ioapic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "intel,quark";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arc";
reg = <1>;
};
intc: ioapic@fec00000 {
compatible = "intel,ioapic";
reg = <0xfec00000 0x100000>;
interrupt-controller;
#interrupt-cells = <3>;
};
};
flash0: flash@40010000 {
compatible = "soc-nv-flash";
reg = <0x40010000 DT_FLASH_SIZE>;
};
flash1: flash@40030000 {
compatible = "soc-nv-flash";
reg = <0x40030000 DT_FLASH_SIZE>;
};
sram0: memory@a8007000 {
device_type = "memory";
compatible = "mmio-sram";
reg = <0xa8007000 DT_SRAM_SIZE>;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
rtc: rtc@b0000400 {
compatible = "intel,qmsi-rtc";
reg = <0xb0000400 0x400>;
clock-frequency = <32768>;
interrupts = <11 IRQ_TYPE_EDGE_RISING 2>;
interrupt-parent = <&intc>;
label = "RTC_0";
};
uart0: uart@b0002000 {
compatible = "intel,qmsi-uart";
reg = <0xb0002000 0x400>;
label = "UART_0";
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 3>;
interrupt-parent = <&intc>;
status = "disabled";
};
uart1: uart@b0002400 {
compatible = "intel,qmsi-uart";
reg = <0xb0002400 0x400>;
label = "UART_1";
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 3>;
interrupt-parent = <&intc>;
status = "disabled";
};
gpio0: gpio@b0000c00 {
compatible = "intel,qmsi-gpio";
reg = <0xb0000c00 0x400>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "GPIO_0";
gpio-controller;
#gpio-cells = <2>;
};
gpio1: gpio@b0800b00 {
compatible = "intel,qmsi-gpio";
reg = <0xb0800b00 0x400>;
interrupts = <31 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "GPIO_1";
gpio-controller;
#gpio-cells = <2>;
};
usb_cdc: virtualcom {
compatible = "intel,qmsi-usb";
label = "CDC_ACM_0";
};
i2c0: i2c@b0002800 {
compatible = "intel,qmsi-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0002800 0x400>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "I2C_0";
status = "disabled";
};
i2c1: i2c@b0002c00 {
compatible = "intel,qmsi-i2c";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0002c00 0x400>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "I2C_1";
status = "disabled";
};
spi0: spi@b0001000 {
compatible = "snps,designware-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0001000 0x400>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "SPI_0";
status = "disabled";
};
spi1: spi@b0001400 {
compatible = "snps,designware-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0001400 0x400>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "SPI_1";
status = "disabled";
};
spi2: spi@b0001800 {
compatible = "snps,designware-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0001800 0x400>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 2>;
interrupt-parent = <&intc>;
label = "SPI_2";
status = "disabled";
};
wdog0: watchdog@b0000000 {
compatible = "intel,qmsi-watchdog";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xb0000000 0x400>;
interrupts = <12 IRQ_TYPE_EDGE_RISING 2>;
interrupt-parent = <&intc>;
label = "WATCHDOG_0";
};
};
};