blob: e0a91308ef9545f0c9e2cdb9f0d315a960a62ea2 [file] [log] [blame]
# Copyright (C) 2018 Synopsys, Inc.
# SPDX-License-Identifier: Apache-2.0
#
#
# Synopsys DesignWare ARC IoT Development Kit
#
# Configure JTAG cable
# IoT DK has built-in FT2232 chip, which is similar to Digilent HS-1.
adapter driver ftdi
# Only specify FTDI serial number if it is specified via
# "set _ZEPHYR_BOARD_SERIAL 12345" before reading this script
if { [info exists _ZEPHYR_BOARD_SERIAL] } {
ftdi_serial $_ZEPHYR_BOARD_SERIAL
}
ftdi_vid_pid 0x0403 0x6010
ftdi_layout_init 0x0088 0x008b
ftdi_channel 1
# EM9D requires 8 MHz.
adapter speed 8000
# ARCs support only JTAG.
transport select jtag
source [find cpu/arc/em.tcl]
set _CHIPNAME arc-em
set _TARGETNAME $_CHIPNAME.cpu
# IOTDK IDENTITY is 0x200444b1
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -expected-id 0x200444b1
set _coreid 0
set _dbgbase [expr 0x00000000 | ($_coreid << 13)]
target create $_TARGETNAME arcv2 -chain-position $_TARGETNAME \
-coreid 0 -dbgbase $_dbgbase -endian little
# There is no SRST, so do a software reset
$_TARGETNAME configure -event reset-assert "arc_em_reset $_TARGETNAME"
arc_em_init_regs