blob: 270d64081e2ae10601ed4ecb3a8de79e3ff62503 [file] [log] [blame]
/*
* Copyright (c) 2022 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 20)>,
<NRF_PSEL(UART_RX, 0, 19)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 20)>,
<NRF_PSEL(UART_RX, 0, 19)>,
<NRF_PSEL(UART_RTS, 0, 5)>,
<NRF_PSEL(UART_CTS, 0, 7)>;
low-power-enable;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
};
};
i2c0_sleep: i2c0_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
<NRF_PSEL(TWIM_SCL, 0, 27)>;
low-power-enable;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
};
};
i2c1_sleep: i2c1_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
<NRF_PSEL(TWIM_SCL, 0, 31)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 22)>,
<NRF_PSEL(PWM_OUT1, 0, 23)>,
<NRF_PSEL(PWM_OUT2, 0, 24)>;
nordic,invert;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 22)>,
<NRF_PSEL(PWM_OUT1, 0, 23)>,
<NRF_PSEL(PWM_OUT2, 0, 24)>;
low-power-enable;
};
};
qspi_default: qspi_default {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 1, 3)>,
<NRF_PSEL(QSPI_IO0, 1, 5)>,
<NRF_PSEL(QSPI_IO1, 1, 4)>,
<NRF_PSEL(QSPI_IO2, 1, 2)>,
<NRF_PSEL(QSPI_IO3, 1, 1)>,
<NRF_PSEL(QSPI_CSN, 1, 6)>;
};
};
qspi_sleep: qspi_sleep {
group1 {
psels = <NRF_PSEL(QSPI_SCK, 1, 3)>,
<NRF_PSEL(QSPI_IO0, 1, 5)>,
<NRF_PSEL(QSPI_IO1, 1, 4)>,
<NRF_PSEL(QSPI_IO2, 1, 2)>,
<NRF_PSEL(QSPI_IO3, 1, 1)>;
low-power-enable;
};
group2 {
psels = <NRF_PSEL(QSPI_CSN, 1, 6)>;
low-power-enable;
bias-pull-up;
};
};
};