boards/arm/mimxrt1010_evk/mimxrt1010_evk-pinctrl.dtsi

/*
 * Copyright (c) 2022, NXP
 * SPDX-License-Identifier: Apache-2.0
 *
 * Note: File generated by rt_cfg_utils.py
 * from mimxrt1010_evk.mex
 */

#include <nxp/nxp_imx/rt/mimxrt1011dae5a-pinctrl.dtsi>

&pinctrl {
	/* ADC Channels 1 and 2, exposed as pins 10 and 12 on J26 of EVK */
	pinmux_adc1: pinmux_adc1 {
		group0 {
			pinmux = <&iomuxc_gpio_ad_01_adc1_in1>,
				<&iomuxc_gpio_ad_02_adc1_in2>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	pinmux_lpi2c1: pinmux_lpi2c1 {
		group0 {
			pinmux = <&iomuxc_gpio_01_lpi2c1_sda>;
			drive-strength = "r0-4";
			drive-open-drain;
			slew-rate = "slow";
			nxp,speed = "100-mhz";
			input-enable;
		};
		group1 {
			pinmux = <&iomuxc_gpio_02_lpi2c1_scl>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	pinmux_lpspi1: pinmux_lpspi1 {
		group0 {
			pinmux = <&iomuxc_gpio_ad_06_lpspi1_sck>,
				<&iomuxc_gpio_ad_05_lpspi1_pcs0>,
				<&iomuxc_gpio_ad_04_lpspi1_sdo>,
				<&iomuxc_gpio_ad_03_lpspi1_sdi>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	/* MCUX SDK sets the drive strength of pins on RT1010 to 4 by default */
	pinmux_lpuart1: pinmux_lpuart1 {
		group0 {
			pinmux = <&iomuxc_gpio_09_lpuart1_rxd>,
				<&iomuxc_gpio_10_lpuart1_txd>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
		group0 {
			pinmux = <&iomuxc_gpio_09_gpiomux_io09>;
			drive-strength = "r0-4";
			bias-pull-up;
			bias-pull-up-value = "100k";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
		group1 {
			pinmux = <&iomuxc_gpio_10_lpuart1_txd>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	/* conflicts with adc1 */
	pinmux_lpuart4: pinmux_lpuart4 {
		group0 {
			pinmux = <&iomuxc_gpio_ad_01_lpuart4_rxd>,
				<&iomuxc_gpio_ad_02_lpuart4_txd>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	/* conflicts with adc1 */
	pinmux_lpuart4_sleep: pinmux_lpuart4_sleep {
		group0 {
			pinmux = <&iomuxc_gpio_ad_01_gpiomux_io15>;
			drive-strength = "r0-4";
			bias-pull-up;
			bias-pull-up-value = "100k";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
		group1 {
			pinmux = <&iomuxc_gpio_ad_02_lpuart4_txd>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

	pinmux_sai1: pinmux_sai1 {
		group0 {
			pinmux = <&iomuxc_gpio_08_sai1_mclk>,
				<&iomuxc_gpio_03_sai1_rx_data0>,
				<&iomuxc_gpio_04_sai1_tx_data0>,
				<&iomuxc_gpio_07_sai1_tx_sync>,
				<&iomuxc_gpio_06_sai1_tx_bclk>;
			drive-strength = "r0-4";
			slew-rate = "slow";
			nxp,speed = "100-mhz";
		};
	};

};