| /* |
| * Copyright (c) 2025 Renesas Electronics Corporation |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /dts-v1/; |
| |
| #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h> |
| #include <zephyr/dt-bindings/input/input-event-codes.h> |
| #include <zephyr/dt-bindings/gpio/renesas-rz-gpio.h> |
| #include <freq.h> |
| #include <arm64/renesas/rz/rza/r9a07g063.dtsi> |
| #include "rza3ul_smarc-pinctrl.dtsi" |
| |
| / { |
| model = "Renesas RZ/A3UL SMARC"; |
| compatible = "renesas,rza3ul-smarc"; |
| |
| chosen { |
| zephyr,sram = &ddr; |
| zephyr,flash = &spi_flash; |
| zephyr,console = &scif0; |
| zephyr,shell-uart = &scif0; |
| zephyr,code-partition= &slot0_partition; |
| }; |
| |
| ddr: memory@40200000 { |
| compatible ="zephyr,memory-region", "mmio-sram"; |
| reg = <0x40200000 (DT_SIZE_M(1024) - 0x200000)>; |
| zephyr,memory-region = "DDR"; |
| }; |
| |
| sram: memory@1e000 { |
| compatible ="zephyr,memory-region", "mmio-sram"; |
| reg = <0x1e000 DT_SIZE_K(72)>; |
| zephyr,memory-region = "SRAM"; |
| }; |
| |
| spi_flash: memory@20020000 { |
| compatible = "mmio-sram"; |
| reg = <0x20020000 (DT_SIZE_M(16) - 0x20000)>; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| header: partition@0 { |
| label = "header"; |
| reg = <0x00000000 0x200>; |
| read-only; |
| }; |
| |
| slot0_partition: partition@200 { |
| label = "image-0"; |
| reg = <0x00000200 (DT_SIZE_M(16)- 0x20200)>; |
| read-only; |
| }; |
| }; |
| }; |
| |
| }; |
| |
| &scif0 { |
| current-speed = <115200>; |
| pinctrl-0 = <&scif0_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| }; |