blob: 360e2b6adae85f583e6f5d1c0bc72bab5e1ad4dc [file] [log] [blame]
CONFIG_ARM=y
CONFIG_BOARD_NUCLEO_F103RB=y
CONFIG_SOC_FAMILY_STM32=y
CONFIG_SOC_SERIES_STM32F1X=y
CONFIG_SOC_STM32F103XB=y
CONFIG_CORTEX_M_SYSTICK=y
# 72MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
# enable uart driver
CONFIG_SERIAL=y
CONFIG_UART_STM32=y
# enable USART2 - passthrough to STLINK v2 connector
CONFIG_UART_STM32_PORT_2=y
CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200
# enable console on this port by default
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2"
# enable pinmux
CONFIG_PINMUX=y
CONFIG_PINMUX_STM32=y
# enable GPIO ports A, B, C
CONFIG_GPIO=y
CONFIG_GPIO_STM32=y
CONFIG_GPIO_STM32_PORTA=y
CONFIG_GPIO_STM32_PORTB=y
CONFIG_GPIO_STM32_PORTC=y
# clock configuration
CONFIG_CLOCK_CONTROL=y
CONFIG_CLOCK_CONTROL_STM32F10X=y
CONFIG_CLOCK_STM32F10X_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32F10X_PLL_SRC_HSE=y
# however, the board does not have an external oscillator, so just use
# the 8MHz clock signal coming from integrated STLink
CONFIG_CLOCK_STM32F10X_HSE_BYPASS=y
# produce 72MHz clock at PLL output
CONFIG_CLOCK_STM32F10X_PLL_MULTIPLIER=9
CONFIG_CLOCK_STM32F10X_AHB_PRESCALER=0
# APB1 clock must not to exceed 36MHz limit
CONFIG_CLOCK_STM32F10X_APB1_PRESCALER=2
CONFIG_CLOCK_STM32F10X_APB2_PRESCALER=0
#enable pwm
CONFIG_PWM=y
CONFIG_PWM_STM32=y
CONFIG_PWM_STM32_1=y