dts/arm/nordic/nrf51822.dtsi

/* SPDX-License-Identifier: Apache-2.0 */

#include <arm/armv6-m.dtsi>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
#include "nrf5_common.dtsi"

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m0";
			reg = <0>;
		};
	};

	flash-controller@4001E000 {
			compatible = "nordic,nrf51-flash-controller";
			reg = <0x4001E000 0x1000>;

			#address-cells = <1>;
			#size-cells = <1>;

			label="NRF_FLASH_DRV_NAME";

			flash0: flash@0 {
				compatible = "soc-nv-flash";
				label = "NRF_FLASH";
				erase-block-size = <1024>;
				write-block-size = <4>;
			};
	};

	sram0: memory@20000000 {
		device_type = "memory";
		compatible = "mmio-sram";
	};

	aliases {
		i2c-0 = &i2c0;
		i2c-1 = &i2c1;
		spi-0 = &spi0;
		spi-1 = &spi1;
		uart-0 = &uart0;
		adc-0 = &adc;
		gpio-0 = &gpio0;
		gpiote-0 = &gpiote;
		wdt-0 = &wdt;
		qdec-0 = &qdec;
		rtc-0 = &rtc0;
		rtc-1 = &rtc1;
		timer-0 = &timer0;
		timer-1 = &timer1;
		timer-2 = &timer2;
	};

	soc {
		adc: adc@40007000 {
			compatible = "nordic,nrf-adc";
			reg = <0x40007000 0x1000>;
			interrupts = <7 1>;
			status = "disabled";
			label = "ADC_0";
		};

		clock: clock@40000000 {
			compatible = "nordic,nrf-clock";
			reg = <0x40000000 0x1000>;
			interrupts = <0 1>;
			status = "ok";
			label = "CLOCK";
		};

		uart0: uart@40002000 {
			compatible = "nordic,nrf-uart";
			reg = <0x40002000 0x1000>;
			interrupts = <2 1>;
			status = "disabled";
			label = "UART_0";
		};

		gpiote: gpiote@40006000 {
			compatible = "nordic,nrf-gpiote";
			reg = <0x40006000 0x1000>;
			interrupts = <6 1>;
			status = "disabled";
			label = "GPIOTE_0";
		};

		gpio0: gpio@50000000 {
			compatible = "nordic,nrf-gpio";
			gpio-controller;
			reg = <0x50000000 0x1000>;
			#gpio-cells = <2>;
			label = "GPIO_0";
			status = "disabled";
		};

		i2c0: i2c@40003000 {
			compatible = "nordic,nrf-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40003000 0x1000>;
			clock-frequency = <I2C_BITRATE_STANDARD>;
			interrupts = <3 1>;
			status = "disabled";
			label = "I2C_0";
		};

		i2c1: i2c@40004000 {
			compatible = "nordic,nrf-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40004000 0x1000>;
			clock-frequency = <I2C_BITRATE_STANDARD>;
			interrupts = <4 1>;
			status = "disabled";
			label = "I2C_1";
		};

		qdec: qdec@40012000 {
			compatible = "nordic,nrf-qdec";
			reg = <0x40012000 0x1000>;
			interrupts = <18 1>;
			status = "disabled";
			label = "QDEC";
		};

		spi0: spi@40003000 {
			compatible = "nordic,nrf-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40003000 0x1000>;
			interrupts = <3 1>;
			status = "disabled";
			label = "SPI_0";
		};

		spi1: spi@40004000 {
			compatible = "nordic,nrf-spi";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40004000 0x1000>;
			interrupts = <4 1>;
			status = "disabled";
			label = "SPI_1";
		};

		rtc0: rtc@4000b000 {
			compatible = "nordic,nrf-rtc";
			reg = <0x4000b000 0x1000>;
			interrupts = <11 1>;
			status = "ok";
			label = "RTC_0";
		};

		rtc1: rtc@40011000 {
			compatible = "nordic,nrf-rtc";
			reg = <0x40011000 0x1000>;
			interrupts = <17 1>;
			status = "ok";
			label = "RTC_1";
		};

		timer0: timer@40008000 {
			compatible = "nordic,nrf-timer";
			status = "ok";
			reg = <0x40008000 0x1000>;
			interrupts = <8 1>;
			label = "TIMER_0";
		};

		timer1: timer@40009000 {
			compatible = "nordic,nrf-timer";
			status = "ok";
			reg = <0x40009000 0x1000>;
			interrupts = <9 1>;
			label = "TIMER_1";
		};

		timer2: timer@4000a000 {
			compatible = "nordic,nrf-timer";
			status = "ok";
			reg = <0x4000a000 0x1000>;
			interrupts = <10 1>;
			label = "TIMER_2";
		};

		temp: temp@4000c000 {
			compatible = "nordic,nrf-temp";
			reg = <0x4000c000 0x1000>;
			interrupts = <12 1>;
			status = "ok";
			label = "TEMP_0";
		};

		wdt: watchdog@40010000 {
			compatible = "nordic,nrf-watchdog";
			reg = <0x40010000 0x1000>;
			interrupts = <16 1>;
			status = "ok";
			label = "WDT";
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <2>;
};

&sw_pwm {
	timer-instance = <1>;
	channel-count = <3>;
	clock-prescaler = <0>;
	ppi-base = <7>;
	gpiote-base = <0>;
	status = "ok";
};