blob: 197a9ac1fd9e9c4d82520a34177c85ea0bb77801 [file] [log] [blame]
/* This file is a temporary workaround for mapping of the generated information
* to the current driver definitions. This will be removed when the drivers
* are modified to handle the generated information, or the mapping of
* generated data matches the driver definitions.
*/
#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define CONFIG_UART_STM32_PORT_1_BASE_ADDRESS ST_STM32_USART_40011000_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_1_BAUD_RATE ST_STM32_USART_40011000_BAUD_RATE
#define CONFIG_UART_STM32_PORT_1_IRQ_PRI ST_STM32_USART_40011000_IRQ_0_PRIORITY
#define PORT_1_IRQ ST_STM32_USART_40011000_IRQ_0
#define CONFIG_UART_STM32_PORT_2_BASE_ADDRESS ST_STM32_USART_40004400_BASE_ADDRESS
#define CONFIG_UART_STM32_PORT_2_BAUD_RATE ST_STM32_USART_40004400_BAUD_RATE
#define CONFIG_UART_STM32_PORT_2_IRQ_PRI ST_STM32_USART_40004400_IRQ_0_PRIORITY
#define PORT_2_IRQ ST_STM32_USART_40004400_IRQ_0