dts/arm/xilinx/zynqmp_rpu.dtsi

/*
 * Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/xilinx/zynqmp.dtsi>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-r5f";
			reg = <0>;
		};
	};

	soc {
		interrupt-parent = <&gic>;

		gic: interrupt-controller@f9000000 {
			compatible = "arm,gic";
			reg = <0xf9000000 0x1000>,
					<0xf9001000 0x100>;
			interrupt-controller;
			#interrupt-cells = <4>;
			label = "GIC";
			status = "okay";
		};
	};
};