blob: a379a81585543818e3422ffdef45812dabb9b8ca [file] [log] [blame]
/*
* Copyright (c) 2022 STMicroelectronics
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Warning: This overlay performs configuration from clean sheet.
* It is assumed that it is applied after clear_clocks.overlay file.
* It applies to the stm32wl where the hse prescaler is 1 and by-passed
*/
&clk_hse {
hse-tcxo;
clock-frequency = <DT_FREQ_M(32)>; /* STLink 32MHz clock */
status = "okay";
};
&rcc {
clocks = <&clk_hse>;
clock-frequency = <DT_FREQ_M(32)>;
};