boards/nxp/frdm_mcxa153/frdm_mcxa153-pinctrl.dtsi

/*
 * Copyright 2025 NXP
 * SPDX-License-Identifier: Apache-2.0
 */

#include <nxp/mcx/MCXA153VLH-pinctrl.h>

&pinctrl {
	pinmux_flexpwm0_pwm0: pinmux_flexpwm0_pwm0 {
		group0 {
			pinmux = <PWM0_A0_P3_6>,
				 <PWM0_B0_P3_7>;
			slew-rate = "fast";
			drive-strength = "low";
		};
	};

	pinmux_i3c0: pinmux_i3c0 {
		group0 {
			pinmux = <I3C0_SDA_P0_16>,
				 <I3C0_SCL_P0_17>;
			slew-rate = "fast";
			drive-strength = "low";
			input-enable;
			bias-pull-up;
		};

		group1 {
			pinmux = <I3C0_PUR_P1_11>;
			slew-rate = "fast";
			drive-strength = "low";
			input-enable;
		};
	};

	pinmux_lpadc0: pinmux_lpadc0 {
		group0 {
			pinmux = <ADC0_A0_P2_0>,
				 <ADC0_A1_P2_1>;
			slew-rate = "fast";
			drive-strength = "low";
		};
	};

	pinmux_lpcmp0: pinmux_lpcmp0 {
		group0 {
			pinmux = <CMP0_IN0_P2_2>;
			drive-strength = "low";
			slew-rate = "fast";
			bias-pull-up;
		};
	};

	pinmux_lpi2c0: pinmux_lpi2c0 {
		group0 {
			pinmux = <LPI2C0_SDA_P1_8>,
				 <LPI2C0_SCL_P1_9>;
			slew-rate = "fast";
			drive-strength = "low";
			input-enable;
			bias-pull-up;
			drive-open-drain;
		};
	};

	pinmux_lpspi0: pinmux_lpspi0 {
		group0 {
			pinmux = <LPSPI0_SDO_P1_0>,
				 <LPSPI0_SCK_P1_1>,
				 <LPSPI0_SDI_P1_2>,
				 <LPSPI0_PCS0_P1_3>;
			slew-rate = "fast";
			drive-strength = "low";
			input-enable;
		};
	};

	pinmux_lpuart0: pinmux_lpuart0 {
		group0 {
			pinmux = <LPUART0_RXD_P0_2>,
				 <LPUART0_TXD_P0_3>;
			drive-strength = "low";
			slew-rate = "fast";
			input-enable;
		};
	};

	pinmux_lpuart2: pinmux_lpuart2 {
		group0 {
			pinmux = <LPUART2_RXD_P3_14>,
				 <LPUART2_TXD_P3_15>;
			drive-strength = "low";
			slew-rate = "fast";
			input-enable;
		};
	};
};