boards/snps/hsdk/hsdk.dtsi

/*
 * Copyright (c) 2019, Synopsys, Inc. All rights reserved.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;

#include <synopsys/arc_hsdk.dtsi>
#include <zephyr/dt-bindings/gpio/arduino-header-r3.h>

/ {
	aliases {
		uart-0 = &uart0;
		led0 = &led0;
		led1 = &led1;
		led2 = &led2;
		led3 = &led3;
	};

	leds {
		compatible = "gpio-leds";

		led0: led_0 {
			gpios = <&cy8c95xx_port1 4 GPIO_ACTIVE_HIGH>;
			label = "LED 0";
		};

		led1: led_1 {
			gpios = <&cy8c95xx_port1 5 GPIO_ACTIVE_HIGH>;
			label = "LED 1";
		};

		led2: led_2 {
			gpios = <&cy8c95xx_port1 6 GPIO_ACTIVE_HIGH>;
			label = "LED 2";
		};

		led3: led_3 {
			gpios = <&cy8c95xx_port1 7 GPIO_ACTIVE_HIGH>;
			label = "LED 3";
		};
	};

	chosen {
		zephyr,sram = &ddr0;
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
	};

	arduino_header: connector {
		compatible = "arduino-header-r3";
		#gpio-cells = <2>;
		gpio-map-mask = <0xffffffff 0xffffffc0>;
		gpio-map-pass-thru = <0 0x3f>;
		gpio-map = <ARDUINO_HEADER_R3_A0 0 &cy8c95xx_port0 2 0>,
			   <ARDUINO_HEADER_R3_A1 0 &cy8c95xx_port0 3 0>,
			   <ARDUINO_HEADER_R3_A2 0 &cy8c95xx_port0 4 0>,
			   <ARDUINO_HEADER_R3_A3 0 &cy8c95xx_port0 5 0>,
			   <ARDUINO_HEADER_R3_A4 0 &gpio0 18 0>,
			   <ARDUINO_HEADER_R3_A5 0 &gpio0 19 0>,
			   <ARDUINO_HEADER_R3_D0 0 &gpio0 23 0>,
			   <ARDUINO_HEADER_R3_D1 0 &gpio0 22 0>,
			   <ARDUINO_HEADER_R3_D2 0 &gpio0 16 0>,
			   <ARDUINO_HEADER_R3_D3 0 &gpio0 17 0>,
			   <ARDUINO_HEADER_R3_D4 0 &gpio0 11 0>,
			   <ARDUINO_HEADER_R3_D5 0 &gpio0 9 0>,
			   <ARDUINO_HEADER_R3_D6 0 &gpio0 21 0>,
			   <ARDUINO_HEADER_R3_D7 0 &gpio0 20 0>,
			   <ARDUINO_HEADER_R3_D8 0 &gpio0 10 0>,
			   <ARDUINO_HEADER_R3_D9 0 &gpio0 8 0>,
			   <ARDUINO_HEADER_R3_D10 0 &gpio0 12 0>,
			   <ARDUINO_HEADER_R3_D11 0 &gpio0 13 0>,
			   <ARDUINO_HEADER_R3_D12 0 &gpio0 14 0>,
			   <ARDUINO_HEADER_R3_D13 0 &gpio0 15 0>,
			   <ARDUINO_HEADER_R3_D14 0 &gpio0 18 0>,
			   <ARDUINO_HEADER_R3_D15 0 &gpio0 19 0>;
	};
};

arduino_spi: &spi2 {};

&uart0 {
	status = "okay";
	current-speed = <115200>;
};

&gpio0 {
	status = "okay";
	interrupts = <56 1>;
};

&creg_gpio {
	status = "okay";
};

&spi0 {
	status = "okay";
	clock-frequency = <33333333>;
	cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 1 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 2 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 3 GPIO_ACTIVE_HIGH>;
};

&spi1 {
	status = "okay";
	clock-frequency = <33333333>;
	cs-gpios = <&creg_gpio 4 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 5 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 6 GPIO_ACTIVE_HIGH>;
};

&spi2 {
	status = "okay";
	clock-frequency = <33333333>;
	cs-gpios = <&creg_gpio 8 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 9 GPIO_ACTIVE_HIGH>,
		   <&creg_gpio 10 GPIO_ACTIVE_HIGH>;
};

&i2c0 {
	status = "okay";
	clock-frequency = <I2C_BITRATE_STANDARD>;

	cy8c95xx: cy8c95xx@20 {
		compatible = "cypress,cy8c95xx-gpio";
		reg = <0x20>;
		ranges;
		#address-cells = <1>;
		#size-cells = <0>;

		cy8c95xx_port0: cy8c95xx_port@0 {
			compatible = "cypress,cy8c95xx-gpio-port";
			reg = <0x00>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			status = "okay";
		};

		cy8c95xx_port1: cy8c95xx_port@1 {
			compatible = "cypress,cy8c95xx-gpio-port";
			reg = <0x01>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			status = "okay";
		};
	};
};