dts/bindings/memory-controllers/st,stm32-xspi-psram.yaml

# Copyright (c) 2025 STMicroelectronics
# SPDX-License-Identifier: Apache-2.0

description: |
  STM32 XSPI PSRAM.

compatible: "st,stm32-xspi-psram"

include: [base.yaml]

properties:
  reg:
    required: true

  size:
    type: int
    required: true
    description: Flash Memory size in bits

  max-frequency:
    type: int
    required: true
    description: Maximum clock frequency of device's xSPI interface in Hz

  fixed-latency:
    type: boolean
    description: |
      Read latency type: variable if not set, fixed if set.

  read-latency:
    type: int
    default: 2
    description: |
      Read latency code
      - 0: LCx2 3 / Fmax 66 MHz
      - 1: LCx2 4 / Fmax 109 MHz
      - 2: LCx2 5 / Fmax 133 MHz
      - 3: LCx2 6 / Fmax 166 MHz
      - 4: LCx2 7 / Fmax 200 MHz
    enum:
      - 0
      - 1
      - 2
      - 3
      - 4

  drive-strength:
    type: int
    default: 0
    description: |
      Drive strength code:
      - 0: Full
      - 1: Half
      - 2: 1/4
      - 3: 1/8
    enum:
      - 0
      - 1
      - 2
      - 3

  write-latency:
    type: int
    default: 2
    description: |
      Write latency code:
      - 0: WLC 3 / Fmax 66 MHz
      - 4: WLC 4 / Fmax 109 MHz
      - 2: WLC 5 / Fmax 133 MHz
      - 5: WLC 6 / Fmax 166 MHz
      - 1: WLC 7 / Fmax 200 MHz
    enum:
      - 0
      - 1
      - 2
      - 4
      - 5

  refresh-rate:
    type: int
    default: 0
    description: |
      - 0: Always 4x refresh
      - 1: Enables 1x refesh when temperature allows
      - 3: Enables 0.5x refresh when temperature allows
    enum:
      - 0
      - 1
      - 3

  pasr:
    type: int
    default: 0
    description: |
      Refresh coverage:
      - 0: Full array
      - 1: Bottom 1/2 array
      - 2: Bottom 1/4 array
      - 3: Bottom 1/8 array
      - 4: None
      - 5: Top 1/2 array
      - 6: Top 1/4 array
      - 7: Top 1/8 array
    enum:
      - 0
      - 1
      - 2
      - 3
      - 4
      - 5
      - 6
      - 7

  io-x16-mode:
    type: boolean
    description: |
      Mode is x8 if not set, and x16 if set.

  rbx:
    type: boolean
    description: |
      If not enabled, reads stay within page (row) boundary.
      If enabled, allows reads cross page (row) boundary.

  burst-length:
    type: int
    default: 1
    description: |
      Burst length:
      0: 16 Byte/Word Wrap
      1: 32 Byte/Word Wrap
      2: 64 Byte/Word Wrap
      3: 2K Byte/1K Word Wrap
    enum:
      - 0
      - 1
      - 2
      - 3

  burst-type-hybrid-wrap:
    type: boolean
    description: |
      If not enabled, burst-length sets the burst address space in which the
      device will continually wrap within.
      If enabled, the device will burst through the initial wrapped burst length
      once, then continue to burst incrementally up to maximum column address
      (2K in X8 mode/1K in X16 mode) before wrapping around within the entire
      column address space

  st,csbound:
    type: int
    default: 3
    description: |
      Limit a transaction to a boundary of aligned addresses. The size of the
      alignment is given by the value: 2^(csbound) bits.
      A csbound value of 0 means the feature is disabled.
      The default is the minimum recommended value in the Reference Manual. It
      is recommended to set this value according to the length of the burst wrap
      of the PSRAM device for the linear burst command.
    enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
           21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]