| <?xml version="1.0" encoding="UTF-8"?> |
| <system name="$${FILENAME}"> |
| <component |
| name="$${FILENAME}" |
| displayName="$${FILENAME}" |
| version="1.0" |
| description="" |
| tags="" |
| categories="System" /> |
| <parameter name="bonusData"><![CDATA[bonusData |
| { |
| element a_16550_uart_0 |
| { |
| datum _sortIndex |
| { |
| value = "5"; |
| type = "int"; |
| } |
| } |
| element a_16550_uart_0.avalon_slave |
| { |
| datum _lockedAddress |
| { |
| value = "0"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "1048576"; |
| type = "String"; |
| } |
| } |
| element altpll_0 |
| { |
| datum _sortIndex |
| { |
| value = "10"; |
| type = "int"; |
| } |
| } |
| element clk_0 |
| { |
| datum _sortIndex |
| { |
| value = "0"; |
| type = "int"; |
| } |
| } |
| element ext_flash |
| { |
| datum _sortIndex |
| { |
| value = "11"; |
| type = "int"; |
| } |
| } |
| element ext_flash.avl_csr |
| { |
| datum baseAddress |
| { |
| value = "1049152"; |
| type = "String"; |
| } |
| } |
| element ext_flash.avl_mem |
| { |
| datum baseAddress |
| { |
| value = "134217728"; |
| type = "String"; |
| } |
| } |
| element i2c_0 |
| { |
| datum _sortIndex |
| { |
| value = "8"; |
| type = "int"; |
| } |
| } |
| element i2c_0.csr |
| { |
| datum baseAddress |
| { |
| value = "1049088"; |
| type = "String"; |
| } |
| } |
| element jtag_uart_0 |
| { |
| datum _sortIndex |
| { |
| value = "3"; |
| type = "int"; |
| } |
| } |
| element jtag_uart_0.avalon_jtag_slave |
| { |
| datum _lockedAddress |
| { |
| value = "1"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "2101248"; |
| type = "String"; |
| } |
| } |
| element led |
| { |
| datum _sortIndex |
| { |
| value = "12"; |
| type = "int"; |
| } |
| } |
| element led.s1 |
| { |
| datum baseAddress |
| { |
| value = "1049312"; |
| type = "String"; |
| } |
| } |
| element msgdma_0 |
| { |
| datum _sortIndex |
| { |
| value = "7"; |
| type = "int"; |
| } |
| } |
| element msgdma_0.csr |
| { |
| datum baseAddress |
| { |
| value = "1049280"; |
| type = "String"; |
| } |
| } |
| element msgdma_0.descriptor_slave |
| { |
| datum baseAddress |
| { |
| value = "1049328"; |
| type = "String"; |
| } |
| } |
| element nios2_gen2_0 |
| { |
| datum _sortIndex |
| { |
| value = "2"; |
| type = "int"; |
| } |
| } |
| element nios2_gen2_0.debug_mem_slave |
| { |
| datum _lockedAddress |
| { |
| value = "1"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "2099200"; |
| type = "String"; |
| } |
| } |
| element onchip_flash_0 |
| { |
| datum _sortIndex |
| { |
| value = "1"; |
| type = "int"; |
| } |
| } |
| element onchip_flash_0.csr |
| { |
| datum _lockedAddress |
| { |
| value = "1"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "2097152"; |
| type = "String"; |
| } |
| } |
| element onchip_flash_0.data |
| { |
| datum _lockedAddress |
| { |
| value = "1"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "0"; |
| type = "String"; |
| } |
| } |
| element onchip_memory2_0 |
| { |
| datum _sortIndex |
| { |
| value = "4"; |
| type = "int"; |
| } |
| } |
| element onchip_memory2_0.s1 |
| { |
| datum _lockedAddress |
| { |
| value = "1"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "4194304"; |
| type = "String"; |
| } |
| } |
| element spi_0 |
| { |
| datum _sortIndex |
| { |
| value = "9"; |
| type = "int"; |
| } |
| } |
| element spi_0.spi_control_port |
| { |
| datum baseAddress |
| { |
| value = "1049216"; |
| type = "String"; |
| } |
| } |
| element sysid |
| { |
| datum _sortIndex |
| { |
| value = "13"; |
| type = "int"; |
| } |
| } |
| element sysid.control_slave |
| { |
| datum baseAddress |
| { |
| value = "1049344"; |
| type = "String"; |
| } |
| } |
| element timer_0 |
| { |
| datum _sortIndex |
| { |
| value = "6"; |
| type = "int"; |
| } |
| } |
| element timer_0.s1 |
| { |
| datum _lockedAddress |
| { |
| value = "0"; |
| type = "boolean"; |
| } |
| datum baseAddress |
| { |
| value = "1049248"; |
| type = "String"; |
| } |
| } |
| } |
| ]]></parameter> |
| <parameter name="clockCrossingAdapter" value="HANDSHAKE" /> |
| <parameter name="device" value="10M50DAF484C6GES" /> |
| <parameter name="deviceFamily" value="MAX 10" /> |
| <parameter name="deviceSpeedGrade" value="6" /> |
| <parameter name="fabricMode" value="QSYS" /> |
| <parameter name="generateLegacySim" value="false" /> |
| <parameter name="generationId" value="0" /> |
| <parameter name="globalResetBus" value="false" /> |
| <parameter name="hdlLanguage" value="VERILOG" /> |
| <parameter name="hideFromIPCatalog" value="false" /> |
| <parameter name="lockedInterfaceDefinition" value="" /> |
| <parameter name="maxAdditionalLatency" value="1" /> |
| <parameter name="projectName" value="ghrd_10m50da.qpf" /> |
| <parameter name="sopcBorderPoints" value="false" /> |
| <parameter name="systemHash" value="0" /> |
| <parameter name="testBenchDutName" value="" /> |
| <parameter name="timeStamp" value="0" /> |
| <parameter name="useTestBenchNamingPattern" value="false" /> |
| <instanceScript></instanceScript> |
| <interface |
| name="a_16550_uart_0_rs_232_modem" |
| internal="a_16550_uart_0.RS_232_Modem" |
| type="conduit" |
| dir="end" /> |
| <interface |
| name="a_16550_uart_0_rs_232_serial" |
| internal="a_16550_uart_0.RS_232_Serial" |
| type="conduit" |
| dir="end" /> |
| <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" /> |
| <interface |
| name="ext_flash_qspi_pins" |
| internal="ext_flash.qspi_pins" |
| type="conduit" |
| dir="end" /> |
| <interface |
| name="i2c_0_i2c_serial" |
| internal="i2c_0.i2c_serial" |
| type="conduit" |
| dir="end" /> |
| <interface |
| name="led_external_connection" |
| internal="led.external_connection" |
| type="conduit" |
| dir="end" /> |
| <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" /> |
| <interface |
| name="spi_0_external" |
| internal="spi_0.external" |
| type="conduit" |
| dir="end" /> |
| <module |
| name="a_16550_uart_0" |
| kind="altera_16550_uart" |
| version="17.0" |
| enabled="1"> |
| <parameter name="DMA_EXTRA" value="0" /> |
| <parameter name="FAMILY" value="MAX 10" /> |
| <parameter name="FIFO_DEPTH" value="64" /> |
| <parameter name="FIFO_HWFC" value="0" /> |
| <parameter name="FIFO_MODE" value="1" /> |
| <parameter name="FIFO_SWFC" value="0" /> |
| <parameter name="FIFO_WATERMARK" value="0" /> |
| <parameter name="MEM_BLOCK_TYPE" value="AUTO" /> |
| <parameter name="clockRate" value="50000000" /> |
| <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter> |
| </module> |
| <module name="altpll_0" kind="altpll" version="17.0" enabled="1"> |
| <parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" /> |
| <parameter name="AUTO_INCLK_INTERFACE_CLOCK_RATE" value="50000000" /> |
| <parameter name="AVALON_USE_SEPARATE_SYSCLK" value="NO" /> |
| <parameter name="BANDWIDTH" value="" /> |
| <parameter name="BANDWIDTH_TYPE" value="AUTO" /> |
| <parameter name="CLK0_DIVIDE_BY" value="2" /> |
| <parameter name="CLK0_DUTY_CYCLE" value="50" /> |
| <parameter name="CLK0_MULTIPLY_BY" value="1" /> |
| <parameter name="CLK0_PHASE_SHIFT" value="0" /> |
| <parameter name="CLK1_DIVIDE_BY" value="" /> |
| <parameter name="CLK1_DUTY_CYCLE" value="" /> |
| <parameter name="CLK1_MULTIPLY_BY" value="" /> |
| <parameter name="CLK1_PHASE_SHIFT" value="" /> |
| <parameter name="CLK2_DIVIDE_BY" value="" /> |
| <parameter name="CLK2_DUTY_CYCLE" value="" /> |
| <parameter name="CLK2_MULTIPLY_BY" value="" /> |
| <parameter name="CLK2_PHASE_SHIFT" value="" /> |
| <parameter name="CLK3_DIVIDE_BY" value="" /> |
| <parameter name="CLK3_DUTY_CYCLE" value="" /> |
| <parameter name="CLK3_MULTIPLY_BY" value="" /> |
| <parameter name="CLK3_PHASE_SHIFT" value="" /> |
| <parameter name="CLK4_DIVIDE_BY" value="" /> |
| <parameter name="CLK4_DUTY_CYCLE" value="" /> |
| <parameter name="CLK4_MULTIPLY_BY" value="" /> |
| <parameter name="CLK4_PHASE_SHIFT" value="" /> |
| <parameter name="CLK5_DIVIDE_BY" value="" /> |
| <parameter name="CLK5_DUTY_CYCLE" value="" /> |
| <parameter name="CLK5_MULTIPLY_BY" value="" /> |
| <parameter name="CLK5_PHASE_SHIFT" value="" /> |
| <parameter name="CLK6_DIVIDE_BY" value="" /> |
| <parameter name="CLK6_DUTY_CYCLE" value="" /> |
| <parameter name="CLK6_MULTIPLY_BY" value="" /> |
| <parameter name="CLK6_PHASE_SHIFT" value="" /> |
| <parameter name="CLK7_DIVIDE_BY" value="" /> |
| <parameter name="CLK7_DUTY_CYCLE" value="" /> |
| <parameter name="CLK7_MULTIPLY_BY" value="" /> |
| <parameter name="CLK7_PHASE_SHIFT" value="" /> |
| <parameter name="CLK8_DIVIDE_BY" value="" /> |
| <parameter name="CLK8_DUTY_CYCLE" value="" /> |
| <parameter name="CLK8_MULTIPLY_BY" value="" /> |
| <parameter name="CLK8_PHASE_SHIFT" value="" /> |
| <parameter name="CLK9_DIVIDE_BY" value="" /> |
| <parameter name="CLK9_DUTY_CYCLE" value="" /> |
| <parameter name="CLK9_MULTIPLY_BY" value="" /> |
| <parameter name="CLK9_PHASE_SHIFT" value="" /> |
| <parameter name="COMPENSATE_CLOCK" value="CLK0" /> |
| <parameter name="DOWN_SPREAD" value="" /> |
| <parameter name="DPA_DIVIDER" value="" /> |
| <parameter name="DPA_DIVIDE_BY" value="" /> |
| <parameter name="DPA_MULTIPLY_BY" value="" /> |
| <parameter name="ENABLE_SWITCH_OVER_COUNTER" value="" /> |
| <parameter name="EXTCLK0_DIVIDE_BY" value="" /> |
| <parameter name="EXTCLK0_DUTY_CYCLE" value="" /> |
| <parameter name="EXTCLK0_MULTIPLY_BY" value="" /> |
| <parameter name="EXTCLK0_PHASE_SHIFT" value="" /> |
| <parameter name="EXTCLK1_DIVIDE_BY" value="" /> |
| <parameter name="EXTCLK1_DUTY_CYCLE" value="" /> |
| <parameter name="EXTCLK1_MULTIPLY_BY" value="" /> |
| <parameter name="EXTCLK1_PHASE_SHIFT" value="" /> |
| <parameter name="EXTCLK2_DIVIDE_BY" value="" /> |
| <parameter name="EXTCLK2_DUTY_CYCLE" value="" /> |
| <parameter name="EXTCLK2_MULTIPLY_BY" value="" /> |
| <parameter name="EXTCLK2_PHASE_SHIFT" value="" /> |
| <parameter name="EXTCLK3_DIVIDE_BY" value="" /> |
| <parameter name="EXTCLK3_DUTY_CYCLE" value="" /> |
| <parameter name="EXTCLK3_MULTIPLY_BY" value="" /> |
| <parameter name="EXTCLK3_PHASE_SHIFT" value="" /> |
| <parameter name="FEEDBACK_SOURCE" value="" /> |
| <parameter name="GATE_LOCK_COUNTER" value="" /> |
| <parameter name="GATE_LOCK_SIGNAL" value="" /> |
| <parameter name="HIDDEN_CONSTANTS">CT#PORT_clk5 PORT_UNUSED CT#PORT_clk4 PORT_UNUSED CT#PORT_clk3 PORT_UNUSED CT#PORT_clk2 PORT_UNUSED CT#PORT_clk1 PORT_UNUSED CT#PORT_clk0 PORT_USED CT#CLK0_MULTIPLY_BY 1 CT#PORT_SCANWRITE PORT_UNUSED CT#PORT_SCANACLR PORT_UNUSED CT#PORT_PFDENA PORT_UNUSED CT#PORT_PLLENA PORT_UNUSED CT#PORT_SCANDATA PORT_UNUSED CT#PORT_SCANCLKENA PORT_UNUSED CT#WIDTH_CLOCK 5 CT#PORT_SCANDATAOUT PORT_UNUSED CT#LPM_TYPE altpll CT#PLL_TYPE AUTO CT#CLK0_PHASE_SHIFT 0 CT#PORT_PHASEDONE PORT_UNUSED CT#OPERATION_MODE NORMAL CT#PORT_CONFIGUPDATE PORT_UNUSED CT#COMPENSATE_CLOCK CLK0 CT#PORT_CLKSWITCH PORT_UNUSED CT#INCLK0_INPUT_FREQUENCY 20000 CT#PORT_SCANDONE PORT_UNUSED CT#PORT_CLKLOSS PORT_UNUSED CT#PORT_INCLK1 PORT_UNUSED CT#AVALON_USE_SEPARATE_SYSCLK NO CT#PORT_INCLK0 PORT_USED CT#PORT_clkena5 PORT_UNUSED CT#PORT_clkena4 PORT_UNUSED CT#PORT_clkena3 PORT_UNUSED CT#PORT_clkena2 PORT_UNUSED CT#PORT_clkena1 PORT_UNUSED CT#PORT_clkena0 PORT_UNUSED CT#PORT_ARESET PORT_UNUSED CT#BANDWIDTH_TYPE AUTO CT#INTENDED_DEVICE_FAMILY {MAX 10} CT#PORT_SCANREAD PORT_UNUSED CT#PORT_PHASESTEP PORT_UNUSED CT#PORT_SCANCLK PORT_UNUSED CT#PORT_CLKBAD1 PORT_UNUSED CT#PORT_CLKBAD0 PORT_UNUSED CT#PORT_FBIN PORT_UNUSED CT#PORT_PHASEUPDOWN PORT_UNUSED CT#PORT_extclk3 PORT_UNUSED CT#PORT_extclk2 PORT_UNUSED CT#PORT_extclk1 PORT_UNUSED CT#PORT_PHASECOUNTERSELECT PORT_UNUSED CT#PORT_extclk0 PORT_UNUSED CT#PORT_ACTIVECLOCK PORT_UNUSED CT#CLK0_DUTY_CYCLE 50 CT#CLK0_DIVIDE_BY 2 CT#PORT_LOCKED PORT_UNUSED</parameter> |
| <parameter name="HIDDEN_CUSTOM_ELABORATION">altpll_avalon_elaboration</parameter> |
| <parameter name="HIDDEN_CUSTOM_POST_EDIT">altpll_avalon_post_edit</parameter> |
| <parameter name="HIDDEN_IF_PORTS">IF#phasecounterselect {input 3} IF#locked {output 0} IF#reset {input 0} IF#clk {input 0} IF#phaseupdown {input 0} IF#scandone {output 0} IF#readdata {output 32} IF#write {input 0} IF#scanclk {input 0} IF#phasedone {output 0} IF#c4 {output 0} IF#c3 {output 0} IF#c2 {output 0} IF#address {input 2} IF#c1 {output 0} IF#c0 {output 0} IF#writedata {input 32} IF#read {input 0} IF#areset {input 0} IF#scanclkena {input 0} IF#scandataout {output 0} IF#configupdate {input 0} IF#phasestep {input 0} IF#scandata {input 0}</parameter> |
| <parameter name="HIDDEN_IS_FIRST_EDIT" value="0" /> |
| <parameter name="HIDDEN_IS_NUMERIC">IN#WIDTH_CLOCK 1 IN#CLK0_DUTY_CYCLE 1 IN#PLL_TARGET_HARCOPY_CHECK 1 IN#SWITCHOVER_COUNT_EDIT 1 IN#INCLK0_INPUT_FREQUENCY 1 IN#PLL_LVDS_PLL_CHECK 1 IN#PLL_AUTOPLL_CHECK 1 IN#PLL_FASTPLL_CHECK 1 IN#PLL_ENHPLL_CHECK 1 IN#DIV_FACTOR0 1 IN#LVDS_MODE_DATA_RATE_DIRTY 1 IN#GLOCK_COUNTER_EDIT 1 IN#CLK0_DIVIDE_BY 1 IN#MULT_FACTOR0 1 IN#CLK0_MULTIPLY_BY 1 IN#USE_MIL_SPEED_GRADE 1</parameter> |
| <parameter name="HIDDEN_MF_PORTS">MF#areset 1 MF#clk 1 MF#locked 1 MF#inclk 1</parameter> |
| <parameter name="HIDDEN_PRIVATES">PT#GLOCKED_FEATURE_ENABLED 0 PT#SPREAD_FEATURE_ENABLED 0 PT#BANDWIDTH_FREQ_UNIT MHz PT#CUR_DEDICATED_CLK c0 PT#INCLK0_FREQ_EDIT 50.000 PT#BANDWIDTH_PRESET Low PT#PLL_LVDS_PLL_CHECK 0 PT#BANDWIDTH_USE_PRESET 0 PT#AVALON_USE_SEPARATE_SYSCLK NO PT#PLL_ENHPLL_CHECK 0 PT#OUTPUT_FREQ_UNIT0 MHz PT#PHASE_RECONFIG_FEATURE_ENABLED 1 PT#CREATE_CLKBAD_CHECK 0 PT#CLKSWITCH_CHECK 0 PT#INCLK1_FREQ_EDIT 100.000 PT#NORMAL_MODE_RADIO 1 PT#SRC_SYNCH_COMP_RADIO 0 PT#PLL_ARESET_CHECK 0 PT#LONG_SCAN_RADIO 1 PT#SCAN_FEATURE_ENABLED 1 PT#PHASE_RECONFIG_INPUTS_CHECK 0 PT#USE_CLK0 1 PT#PRIMARY_CLK_COMBO inclk0 PT#BANDWIDTH 1.000 PT#GLOCKED_COUNTER_EDIT_CHANGED 1 PT#PLL_FASTPLL_CHECK 0 PT#SPREAD_FREQ_UNIT KHz PT#PLL_AUTOPLL_CHECK 1 PT#LVDS_PHASE_SHIFT_UNIT0 deg PT#SWITCHOVER_FEATURE_ENABLED 0 PT#MIG_DEVICE_SPEED_GRADE Any PT#OUTPUT_FREQ_MODE0 1 PT#BANDWIDTH_FEATURE_ENABLED 1 PT#INCLK0_FREQ_UNIT_COMBO MHz PT#ZERO_DELAY_RADIO 0 PT#OUTPUT_FREQ0 25.00000000 PT#SHORT_SCAN_RADIO 0 PT#LVDS_MODE_DATA_RATE_DIRTY 0 PT#CUR_FBIN_CLK c0 PT#PLL_ADVANCED_PARAM_CHECK 0 PT#CLKBAD_SWITCHOVER_CHECK 0 PT#PHASE_SHIFT_STEP_ENABLED_CHECK 0 PT#DEVICE_SPEED_GRADE Any PT#PLL_FBMIMIC_CHECK 0 PT#LVDS_MODE_DATA_RATE {Not Available} PT#LOCKED_OUTPUT_CHECK 0 PT#SPREAD_PERCENT 0.500 PT#PHASE_SHIFT0 0.00000000 PT#DIV_FACTOR0 1 PT#CNX_NO_COMPENSATE_RADIO 0 PT#USE_CLKENA0 0 PT#CREATE_INCLK1_CHECK 0 PT#GLOCK_COUNTER_EDIT 1048575 PT#INCLK1_FREQ_UNIT_COMBO MHz PT#EFF_OUTPUT_FREQ_VALUE0 25.000000 PT#SPREAD_FREQ 50.000 PT#USE_MIL_SPEED_GRADE 0 PT#EXPLICIT_SWITCHOVER_COUNTER 0 PT#STICKY_CLK4 0 PT#STICKY_CLK3 0 PT#STICKY_CLK2 0 PT#STICKY_CLK1 0 PT#STICKY_CLK0 1 PT#EXT_FEEDBACK_RADIO 0 PT#MIRROR_CLK0 0 PT#SWITCHOVER_COUNT_EDIT 1 PT#SELF_RESET_LOCK_LOSS 0 PT#PLL_PFDENA_CHECK 0 PT#INT_FEEDBACK__MODE_RADIO 1 PT#INCLK1_FREQ_EDIT_CHANGED 1 PT#CLKLOSS_CHECK 0 PT#SYNTH_WRAPPER_GEN_POSTFIX 0 PT#PHASE_SHIFT_UNIT0 deg PT#BANDWIDTH_USE_AUTO 1 PT#HAS_MANUAL_SWITCHOVER 1 PT#MULT_FACTOR0 1 PT#SPREAD_USE 0 PT#GLOCKED_MODE_CHECK 0 PT#SACN_INPUTS_CHECK 0 PT#DUTY_CYCLE0 50.00000000 PT#INTENDED_DEVICE_FAMILY {MAX 10} PT#PLL_TARGET_HARCOPY_CHECK 0 PT#INCLK1_FREQ_UNIT_CHANGED 1 PT#RECONFIG_FILE ALTPLL1509345238202295.mif PT#ACTIVECLK_CHECK 0</parameter> |
| <parameter name="HIDDEN_USED_PORTS">UP#locked used UP#c0 used UP#areset used UP#inclk0 used</parameter> |
| <parameter name="INCLK0_INPUT_FREQUENCY" value="20000" /> |
| <parameter name="INCLK1_INPUT_FREQUENCY" value="" /> |
| <parameter name="INTENDED_DEVICE_FAMILY" value="MAX 10" /> |
| <parameter name="INVALID_LOCK_MULTIPLIER" value="" /> |
| <parameter name="LOCK_HIGH" value="" /> |
| <parameter name="LOCK_LOW" value="" /> |
| <parameter name="OPERATION_MODE" value="NORMAL" /> |
| <parameter name="PLL_TYPE" value="AUTO" /> |
| <parameter name="PORT_ACTIVECLOCK" value="PORT_UNUSED" /> |
| <parameter name="PORT_ARESET" value="PORT_UNUSED" /> |
| <parameter name="PORT_CLKBAD0" value="PORT_UNUSED" /> |
| <parameter name="PORT_CLKBAD1" value="PORT_UNUSED" /> |
| <parameter name="PORT_CLKLOSS" value="PORT_UNUSED" /> |
| <parameter name="PORT_CLKSWITCH" value="PORT_UNUSED" /> |
| <parameter name="PORT_CONFIGUPDATE" value="PORT_UNUSED" /> |
| <parameter name="PORT_ENABLE0" value="" /> |
| <parameter name="PORT_ENABLE1" value="" /> |
| <parameter name="PORT_FBIN" value="PORT_UNUSED" /> |
| <parameter name="PORT_FBOUT" value="" /> |
| <parameter name="PORT_INCLK0" value="PORT_USED" /> |
| <parameter name="PORT_INCLK1" value="PORT_UNUSED" /> |
| <parameter name="PORT_LOCKED" value="PORT_UNUSED" /> |
| <parameter name="PORT_PFDENA" value="PORT_UNUSED" /> |
| <parameter name="PORT_PHASECOUNTERSELECT" value="PORT_UNUSED" /> |
| <parameter name="PORT_PHASEDONE" value="PORT_UNUSED" /> |
| <parameter name="PORT_PHASESTEP" value="PORT_UNUSED" /> |
| <parameter name="PORT_PHASEUPDOWN" value="PORT_UNUSED" /> |
| <parameter name="PORT_PLLENA" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANACLR" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANCLK" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANCLKENA" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANDATA" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANDATAOUT" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANDONE" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANREAD" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCANWRITE" value="PORT_UNUSED" /> |
| <parameter name="PORT_SCLKOUT0" value="" /> |
| <parameter name="PORT_SCLKOUT1" value="" /> |
| <parameter name="PORT_VCOOVERRANGE" value="" /> |
| <parameter name="PORT_VCOUNDERRANGE" value="" /> |
| <parameter name="PORT_clk0" value="PORT_USED" /> |
| <parameter name="PORT_clk1" value="PORT_UNUSED" /> |
| <parameter name="PORT_clk2" value="PORT_UNUSED" /> |
| <parameter name="PORT_clk3" value="PORT_UNUSED" /> |
| <parameter name="PORT_clk4" value="PORT_UNUSED" /> |
| <parameter name="PORT_clk5" value="PORT_UNUSED" /> |
| <parameter name="PORT_clk6" value="" /> |
| <parameter name="PORT_clk7" value="" /> |
| <parameter name="PORT_clk8" value="" /> |
| <parameter name="PORT_clk9" value="" /> |
| <parameter name="PORT_clkena0" value="PORT_UNUSED" /> |
| <parameter name="PORT_clkena1" value="PORT_UNUSED" /> |
| <parameter name="PORT_clkena2" value="PORT_UNUSED" /> |
| <parameter name="PORT_clkena3" value="PORT_UNUSED" /> |
| <parameter name="PORT_clkena4" value="PORT_UNUSED" /> |
| <parameter name="PORT_clkena5" value="PORT_UNUSED" /> |
| <parameter name="PORT_extclk0" value="PORT_UNUSED" /> |
| <parameter name="PORT_extclk1" value="PORT_UNUSED" /> |
| <parameter name="PORT_extclk2" value="PORT_UNUSED" /> |
| <parameter name="PORT_extclk3" value="PORT_UNUSED" /> |
| <parameter name="PORT_extclkena0" value="" /> |
| <parameter name="PORT_extclkena1" value="" /> |
| <parameter name="PORT_extclkena2" value="" /> |
| <parameter name="PORT_extclkena3" value="" /> |
| <parameter name="PRIMARY_CLOCK" value="" /> |
| <parameter name="QUALIFY_CONF_DONE" value="" /> |
| <parameter name="SCAN_CHAIN" value="" /> |
| <parameter name="SCAN_CHAIN_MIF_FILE" value="" /> |
| <parameter name="SCLKOUT0_PHASE_SHIFT" value="" /> |
| <parameter name="SCLKOUT1_PHASE_SHIFT" value="" /> |
| <parameter name="SELF_RESET_ON_GATED_LOSS_LOCK" value="" /> |
| <parameter name="SELF_RESET_ON_LOSS_LOCK" value="" /> |
| <parameter name="SKIP_VCO" value="" /> |
| <parameter name="SPREAD_FREQUENCY" value="" /> |
| <parameter name="SWITCH_OVER_COUNTER" value="" /> |
| <parameter name="SWITCH_OVER_ON_GATED_LOCK" value="" /> |
| <parameter name="SWITCH_OVER_ON_LOSSCLK" value="" /> |
| <parameter name="SWITCH_OVER_TYPE" value="" /> |
| <parameter name="USING_FBMIMICBIDIR_PORT" value="" /> |
| <parameter name="VALID_LOCK_MULTIPLIER" value="" /> |
| <parameter name="VCO_DIVIDE_BY" value="" /> |
| <parameter name="VCO_FREQUENCY_CONTROL" value="" /> |
| <parameter name="VCO_MULTIPLY_BY" value="" /> |
| <parameter name="VCO_PHASE_SHIFT_STEP" value="" /> |
| <parameter name="WIDTH_CLOCK" value="5" /> |
| <parameter name="WIDTH_PHASECOUNTERSELECT" value="" /> |
| </module> |
| <module name="clk_0" kind="clock_source" version="17.0" enabled="1"> |
| <parameter name="clockFrequency" value="50000000" /> |
| <parameter name="clockFrequencyKnown" value="true" /> |
| <parameter name="inputClockFrequency" value="0" /> |
| <parameter name="resetSynchronousEdges" value="NONE" /> |
| </module> |
| <module |
| name="ext_flash" |
| kind="altera_generic_quad_spi_controller2" |
| version="17.0" |
| enabled="1"> |
| <parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" /> |
| <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" /> |
| <parameter name="CHIP_SELS" value="1" /> |
| <parameter name="DEVICE_FAMILY" value="MAX 10" /> |
| <parameter name="FLASH_TYPE" value="Micron512" /> |
| <parameter name="IO_MODE" value="QUAD" /> |
| <parameter name="clkFreq" value="25000000" /> |
| <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter> |
| </module> |
| <module name="i2c_0" kind="altera_avalon_i2c" version="17.0" enabled="1"> |
| <parameter name="FIFO_DEPTH" value="16" /> |
| <parameter name="USE_AV_ST" value="0" /> |
| <parameter name="clockRate" value="50000000" /> |
| </module> |
| <module |
| name="jtag_uart_0" |
| kind="altera_avalon_jtag_uart" |
| version="17.0" |
| enabled="1"> |
| <parameter name="allowMultipleConnections" value="false" /> |
| <parameter name="avalonSpec" value="2.0" /> |
| <parameter name="clkFreq" value="50000000" /> |
| <parameter name="hubInstanceID" value="0" /> |
| <parameter name="readBufferDepth" value="64" /> |
| <parameter name="readIRQThreshold" value="8" /> |
| <parameter name="simInputCharacterStream" value="" /> |
| <parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter> |
| <parameter name="useRegistersForReadBuffer" value="true" /> |
| <parameter name="useRegistersForWriteBuffer" value="true" /> |
| <parameter name="useRelativePathForSimFile" value="false" /> |
| <parameter name="writeBufferDepth" value="64" /> |
| <parameter name="writeIRQThreshold" value="8" /> |
| </module> |
| <module name="led" kind="altera_avalon_pio" version="17.0" enabled="1"> |
| <parameter name="bitClearingEdgeCapReg" value="false" /> |
| <parameter name="bitModifyingOutReg" value="false" /> |
| <parameter name="captureEdge" value="false" /> |
| <parameter name="clockRate" value="50000000" /> |
| <parameter name="direction" value="Output" /> |
| <parameter name="edgeType" value="RISING" /> |
| <parameter name="generateIRQ" value="false" /> |
| <parameter name="irqType" value="LEVEL" /> |
| <parameter name="resetValue" value="0" /> |
| <parameter name="simDoTestBenchWiring" value="false" /> |
| <parameter name="simDrivenValue" value="0" /> |
| <parameter name="width" value="4" /> |
| </module> |
| <module name="msgdma_0" kind="altera_msgdma" version="17.0" enabled="1"> |
| <parameter name="AUTO_DESCRIPTOR_READ_MASTER_ADDRESS_MAP" value="" /> |
| <parameter |
| name="AUTO_DESCRIPTOR_READ_MASTER_ADDRESS_WIDTH" |
| value="AddressWidth = -1" /> |
| <parameter name="AUTO_DESCRIPTOR_WRITE_MASTER_ADDRESS_MAP" value="" /> |
| <parameter |
| name="AUTO_DESCRIPTOR_WRITE_MASTER_ADDRESS_WIDTH" |
| value="AddressWidth = -1" /> |
| <parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" /> |
| <parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" /> |
| <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" /> |
| <parameter name="AUTO_MM_READ_ADDRESS_MAP"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' /></address-map>]]></parameter> |
| <parameter name="AUTO_MM_READ_ADDRESS_WIDTH" value="AddressWidth = 23" /> |
| <parameter name="AUTO_MM_WRITE_ADDRESS_MAP"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' /></address-map>]]></parameter> |
| <parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH" value="AddressWidth = 23" /> |
| <parameter name="BURST_ENABLE" value="1" /> |
| <parameter name="BURST_WRAPPING_SUPPORT" value="1" /> |
| <parameter name="CHANNEL_ENABLE" value="0" /> |
| <parameter name="CHANNEL_WIDTH" value="8" /> |
| <parameter name="DATA_FIFO_DEPTH" value="32" /> |
| <parameter name="DATA_WIDTH" value="32" /> |
| <parameter name="DESCRIPTOR_FIFO_DEPTH" value="128" /> |
| <parameter name="ENHANCED_FEATURES" value="0" /> |
| <parameter name="ERROR_ENABLE" value="0" /> |
| <parameter name="ERROR_WIDTH" value="8" /> |
| <parameter name="EXPOSE_ST_PORT" value="0" /> |
| <parameter name="FIX_ADDRESS_WIDTH" value="32" /> |
| <parameter name="MAX_BURST_COUNT" value="2" /> |
| <parameter name="MAX_BYTE" value="1024" /> |
| <parameter name="MAX_STRIDE" value="1" /> |
| <parameter name="MODE" value="0" /> |
| <parameter name="PACKET_ENABLE" value="0" /> |
| <parameter name="PREFETCHER_DATA_WIDTH" value="32" /> |
| <parameter name="PREFETCHER_ENABLE" value="0" /> |
| <parameter name="PREFETCHER_MAX_READ_BURST_COUNT" value="2" /> |
| <parameter name="PREFETCHER_READ_BURST_ENABLE" value="0" /> |
| <parameter name="PROGRAMMABLE_BURST_ENABLE" value="0" /> |
| <parameter name="RESPONSE_PORT" value="2" /> |
| <parameter name="STRIDE_ENABLE" value="0" /> |
| <parameter name="TRANSFER_TYPE" value="Aligned Accesses" /> |
| <parameter name="USE_FIX_ADDRESS_WIDTH" value="0" /> |
| </module> |
| <module |
| name="nios2_gen2_0" |
| kind="altera_nios2_gen2" |
| version="17.0" |
| enabled="1"> |
| <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" /> |
| <parameter name="AUTO_CLK_RESET_DOMAIN" value="1" /> |
| <parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" /> |
| <parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" /> |
| <parameter name="bht_ramBlockType" value="Automatic" /> |
| <parameter name="breakOffset" value="32" /> |
| <parameter name="breakSlave" value="None" /> |
| <parameter name="cdx_enabled" value="false" /> |
| <parameter name="clockFrequency" value="50000000" /> |
| <parameter name="cpuArchRev" value="1" /> |
| <parameter name="cpuID" value="0" /> |
| <parameter name="cpuReset" value="false" /> |
| <parameter name="customInstSlavesSystemInfo" value="<info/>" /> |
| <parameter name="customInstSlavesSystemInfo_nios_a" value="<info/>" /> |
| <parameter name="customInstSlavesSystemInfo_nios_b" value="<info/>" /> |
| <parameter name="customInstSlavesSystemInfo_nios_c" value="<info/>" /> |
| <parameter name="dataAddrWidth" value="28" /> |
| <parameter name="dataMasterHighPerformanceAddrWidth" value="1" /> |
| <parameter name="dataMasterHighPerformanceMapParam" value="" /> |
| <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='onchip_flash_0.data' start='0x0' end='0xB8000' type='altera_onchip_flash.data' /><slave name='a_16550_uart_0.avalon_slave' start='0x100000' end='0x100200' type='altera_16550_uart.avalon_slave' /><slave name='i2c_0.csr' start='0x100200' end='0x100240' type='altera_avalon_i2c.csr' /><slave name='ext_flash.avl_csr' start='0x100240' end='0x100280' type='altera_generic_quad_spi_controller2.avl_csr' /><slave name='spi_0.spi_control_port' start='0x100280' end='0x1002A0' type='altera_avalon_spi.spi_control_port' /><slave name='timer_0.s1' start='0x1002A0' end='0x1002C0' type='altera_avalon_timer.s1' /><slave name='msgdma_0.csr' start='0x1002C0' end='0x1002E0' type='altera_msgdma.csr' /><slave name='led.s1' start='0x1002E0' end='0x1002F0' type='altera_avalon_pio.s1' /><slave name='msgdma_0.descriptor_slave' start='0x1002F0' end='0x100300' type='altera_msgdma.descriptor_slave' /><slave name='sysid.control_slave' start='0x100300' end='0x100308' type='altera_avalon_sysid_qsys.control_slave' /><slave name='onchip_flash_0.csr' start='0x200000' end='0x200008' type='altera_onchip_flash.csr' /><slave name='nios2_gen2_0.debug_mem_slave' start='0x200800' end='0x201000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x201000' end='0x201008' type='altera_avalon_jtag_uart.avalon_jtag_slave' /><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' type='altera_avalon_onchip_memory2.s1' /><slave name='ext_flash.avl_mem' start='0x8000000' end='0xC000000' type='altera_generic_quad_spi_controller2.avl_mem' /></address-map>]]></parameter> |
| <parameter name="data_master_high_performance_paddr_base" value="0" /> |
| <parameter name="data_master_high_performance_paddr_size" value="0" /> |
| <parameter name="data_master_paddr_base" value="0" /> |
| <parameter name="data_master_paddr_size" value="0" /> |
| <parameter name="dcache_bursts" value="false" /> |
| <parameter name="dcache_numTCDM" value="0" /> |
| <parameter name="dcache_ramBlockType" value="Automatic" /> |
| <parameter name="dcache_size" value="2048" /> |
| <parameter name="dcache_tagramBlockType" value="Automatic" /> |
| <parameter name="dcache_victim_buf_impl" value="ram" /> |
| <parameter name="debug_OCIOnchipTrace" value="_128" /> |
| <parameter name="debug_assignJtagInstanceID" value="false" /> |
| <parameter name="debug_datatrigger" value="4" /> |
| <parameter name="debug_debugReqSignals" value="false" /> |
| <parameter name="debug_enabled" value="true" /> |
| <parameter name="debug_hwbreakpoint" value="4" /> |
| <parameter name="debug_jtagInstanceID" value="0" /> |
| <parameter name="debug_traceStorage" value="onchip_trace" /> |
| <parameter name="debug_traceType" value="none" /> |
| <parameter name="debug_triggerArming" value="true" /> |
| <parameter name="deviceFamilyName" value="MAX 10" /> |
| <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter> |
| <parameter name="dividerType" value="srt2" /> |
| <parameter name="exceptionOffset" value="32" /> |
| <parameter name="exceptionSlave" value="onchip_memory2_0.s1" /> |
| <parameter name="faAddrWidth" value="1" /> |
| <parameter name="faSlaveMapParam" value="" /> |
| <parameter name="fa_cache_line" value="2" /> |
| <parameter name="fa_cache_linesize" value="0" /> |
| <parameter name="flash_instruction_master_paddr_base" value="0" /> |
| <parameter name="flash_instruction_master_paddr_size" value="0" /> |
| <parameter name="icache_burstType" value="None" /> |
| <parameter name="icache_numTCIM" value="0" /> |
| <parameter name="icache_ramBlockType" value="Automatic" /> |
| <parameter name="icache_size" value="4096" /> |
| <parameter name="icache_tagramBlockType" value="Automatic" /> |
| <parameter name="impl" value="Fast" /> |
| <parameter name="instAddrWidth" value="28" /> |
| <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_flash_0.data' start='0x0' end='0xB8000' type='altera_onchip_flash.data' /><slave name='nios2_gen2_0.debug_mem_slave' start='0x200800' end='0x201000' type='altera_nios2_gen2.debug_mem_slave' /><slave name='onchip_memory2_0.s1' start='0x400000' end='0x420000' type='altera_avalon_onchip_memory2.s1' /><slave name='ext_flash.avl_mem' start='0x8000000' end='0xC000000' type='altera_generic_quad_spi_controller2.avl_mem' /></address-map>]]></parameter> |
| <parameter name="instructionMasterHighPerformanceAddrWidth" value="1" /> |
| <parameter name="instructionMasterHighPerformanceMapParam" value="" /> |
| <parameter name="instruction_master_high_performance_paddr_base" value="0" /> |
| <parameter name="instruction_master_high_performance_paddr_size" value="0" /> |
| <parameter name="instruction_master_paddr_base" value="0" /> |
| <parameter name="instruction_master_paddr_size" value="0" /> |
| <parameter name="internalIrqMaskSystemInfo" value="127" /> |
| <parameter name="io_regionbase" value="0" /> |
| <parameter name="io_regionsize" value="0" /> |
| <parameter name="master_addr_map" value="false" /> |
| <parameter name="mmu_TLBMissExcOffset" value="0" /> |
| <parameter name="mmu_TLBMissExcSlave" value="None" /> |
| <parameter name="mmu_autoAssignTlbPtrSz" value="true" /> |
| <parameter name="mmu_enabled" value="false" /> |
| <parameter name="mmu_processIDNumBits" value="8" /> |
| <parameter name="mmu_ramBlockType" value="Automatic" /> |
| <parameter name="mmu_tlbNumWays" value="16" /> |
| <parameter name="mmu_tlbPtrSz" value="7" /> |
| <parameter name="mmu_udtlbNumEntries" value="6" /> |
| <parameter name="mmu_uitlbNumEntries" value="4" /> |
| <parameter name="mpu_enabled" value="false" /> |
| <parameter name="mpu_minDataRegionSize" value="12" /> |
| <parameter name="mpu_minInstRegionSize" value="12" /> |
| <parameter name="mpu_numOfDataRegion" value="8" /> |
| <parameter name="mpu_numOfInstRegion" value="8" /> |
| <parameter name="mpu_useLimit" value="false" /> |
| <parameter name="mpx_enabled" value="false" /> |
| <parameter name="mul_32_impl" value="2" /> |
| <parameter name="mul_64_impl" value="1" /> |
| <parameter name="mul_shift_choice" value="0" /> |
| <parameter name="ocimem_ramBlockType" value="Automatic" /> |
| <parameter name="ocimem_ramInit" value="false" /> |
| <parameter name="regfile_ramBlockType" value="Automatic" /> |
| <parameter name="register_file_por" value="false" /> |
| <parameter name="resetOffset" value="0" /> |
| <parameter name="resetSlave" value="onchip_flash_0.data" /> |
| <parameter name="resetrequest_enabled" value="true" /> |
| <parameter name="setting_HBreakTest" value="false" /> |
| <parameter name="setting_HDLSimCachesCleared" value="true" /> |
| <parameter name="setting_activateMonitors" value="true" /> |
| <parameter name="setting_activateTestEndChecker" value="false" /> |
| <parameter name="setting_activateTrace" value="false" /> |
| <parameter name="setting_allow_break_inst" value="false" /> |
| <parameter name="setting_alwaysEncrypt" value="true" /> |
| <parameter name="setting_asic_add_scan_mode_input" value="false" /> |
| <parameter name="setting_asic_enabled" value="false" /> |
| <parameter name="setting_asic_synopsys_translate_on_off" value="false" /> |
| <parameter name="setting_asic_third_party_synthesis" value="false" /> |
| <parameter name="setting_avalonDebugPortPresent" value="false" /> |
| <parameter name="setting_bhtPtrSz" value="8" /> |
| <parameter name="setting_bigEndian" value="false" /> |
| <parameter name="setting_branchpredictiontype" value="Dynamic" /> |
| <parameter name="setting_breakslaveoveride" value="false" /> |
| <parameter name="setting_clearXBitsLDNonBypass" value="true" /> |
| <parameter name="setting_dc_ecc_present" value="true" /> |
| <parameter name="setting_disable_tmr_inj" value="false" /> |
| <parameter name="setting_disableocitrace" value="false" /> |
| <parameter name="setting_dtcm_ecc_present" value="true" /> |
| <parameter name="setting_ecc_present" value="false" /> |
| <parameter name="setting_ecc_sim_test_ports" value="false" /> |
| <parameter name="setting_exportHostDebugPort" value="false" /> |
| <parameter name="setting_exportPCB" value="false" /> |
| <parameter name="setting_export_large_RAMs" value="false" /> |
| <parameter name="setting_exportdebuginfo" value="false" /> |
| <parameter name="setting_exportvectors" value="false" /> |
| <parameter name="setting_fast_register_read" value="false" /> |
| <parameter name="setting_ic_ecc_present" value="true" /> |
| <parameter name="setting_interruptControllerType" value="Internal" /> |
| <parameter name="setting_itcm_ecc_present" value="true" /> |
| <parameter name="setting_mmu_ecc_present" value="true" /> |
| <parameter name="setting_oci_export_jtag_signals" value="false" /> |
| <parameter name="setting_oci_version" value="1" /> |
| <parameter name="setting_preciseIllegalMemAccessException" value="false" /> |
| <parameter name="setting_removeRAMinit" value="false" /> |
| <parameter name="setting_rf_ecc_present" value="true" /> |
| <parameter name="setting_shadowRegisterSets" value="0" /> |
| <parameter name="setting_showInternalSettings" value="false" /> |
| <parameter name="setting_showUnpublishedSettings" value="false" /> |
| <parameter name="setting_support31bitdcachebypass" value="true" /> |
| <parameter name="setting_tmr_output_disable" value="false" /> |
| <parameter name="setting_usedesignware" value="false" /> |
| <parameter name="shift_rot_impl" value="1" /> |
| <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledDataMaster0MapParam" value="" /> |
| <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledDataMaster1MapParam" value="" /> |
| <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledDataMaster2MapParam" value="" /> |
| <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledDataMaster3MapParam" value="" /> |
| <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" /> |
| <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" /> |
| <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" /> |
| <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" /> |
| <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" /> |
| <parameter name="tightly_coupled_data_master_0_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_data_master_0_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_data_master_1_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_data_master_1_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_data_master_2_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_data_master_2_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_data_master_3_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_data_master_3_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" /> |
| <parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" /> |
| <parameter name="tmr_enabled" value="false" /> |
| <parameter name="tracefilename" value="" /> |
| <parameter name="userDefinedSettings" value="" /> |
| </module> |
| <module |
| name="onchip_flash_0" |
| kind="altera_onchip_flash" |
| version="17.0" |
| enabled="1"> |
| <parameter name="AUTO_CLOCK_RATE" value="50000000" /> |
| <parameter name="CLOCK_FREQUENCY" value="116.0" /> |
| <parameter name="CONFIGURATION_MODE">Single Compressed Image</parameter> |
| <parameter name="CONFIGURATION_SCHEME">Internal Configuration</parameter> |
| <parameter name="DATA_INTERFACE" value="Parallel" /> |
| <parameter name="DEVICE_FAMILY" value="MAX 10" /> |
| <parameter name="PART_NAME" value="10M50DAF484C6GES" /> |
| <parameter name="READ_BURST_COUNT" value="8" /> |
| <parameter name="READ_BURST_MODE" value="Incrementing" /> |
| <parameter name="SECTOR_ACCESS_MODE">Read and write,Read and write,Read and write,Read and write,Hidden</parameter> |
| <parameter name="autoInitializationFileName">$${FILENAME}_onchip_flash_0</parameter> |
| <parameter name="initFlashContent" value="false" /> |
| <parameter name="initializationFileName">altera_onchip_flash.hex</parameter> |
| <parameter name="initializationFileNameForSim">altera_onchip_flash.dat</parameter> |
| <parameter name="useNonDefaultInitFile" value="false" /> |
| </module> |
| <module |
| name="onchip_memory2_0" |
| kind="altera_avalon_onchip_memory2" |
| version="17.0" |
| enabled="1"> |
| <parameter name="allowInSystemMemoryContentEditor" value="false" /> |
| <parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory2_0</parameter> |
| <parameter name="blockType" value="AUTO" /> |
| <parameter name="copyInitFile" value="false" /> |
| <parameter name="dataWidth" value="32" /> |
| <parameter name="dataWidth2" value="32" /> |
| <parameter name="deviceFamily" value="MAX 10" /> |
| <parameter name="deviceFeatures">ADDRESS_STALL 1 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 1 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 0 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 1 FPP_COMPLETELY_PLACES_AND_ROUTES_PERIPHERY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 0 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 0 HAS_IDB_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NADDER_STYLE_CLOCKING 0 HAS_NADDER_STYLE_FF 0 HAS_NADDER_STYLE_LCELL_COMB 0 HAS_NEW_CDB_NAME_FOR_M20K_SCLR 0 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PDN_MODEL_STATUS 1 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 0 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 1 HAS_SYNTHESIS_ON_ATOMS 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 0 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_BARE_DIE 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_REVE_SILICON 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LOAD_BLK_TYPE_DATA_FROM_ATOM_WYS_INFO 0 LVDS_IO 0 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 0 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_ONLY 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 0 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RESTRICT_PARTIAL_RECONFIG 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_LICENSE_FREE_PARTIAL_RECONFIG 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 SUPPORT_HIGH_SPEED_HPS 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 0 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 0 USES_SECOND_GENERATION_PART_INFO 0 USES_SECOND_GENERATION_POWER_ANALYZER 0 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 1 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter> |
| <parameter name="dualPort" value="false" /> |
| <parameter name="ecc_enabled" value="false" /> |
| <parameter name="enPRInitMode" value="false" /> |
| <parameter name="enableDiffWidth" value="false" /> |
| <parameter name="initMemContent" value="false" /> |
| <parameter name="initializationFileName" value="onchip_mem.hex" /> |
| <parameter name="instanceID" value="NONE" /> |
| <parameter name="memorySize" value="131072" /> |
| <parameter name="readDuringWriteMode" value="DONT_CARE" /> |
| <parameter name="resetrequest_enabled" value="true" /> |
| <parameter name="simAllowMRAMContentsFile" value="false" /> |
| <parameter name="simMemInitOnlyFilename" value="0" /> |
| <parameter name="singleClockOperation" value="false" /> |
| <parameter name="slave1Latency" value="1" /> |
| <parameter name="slave2Latency" value="1" /> |
| <parameter name="useNonDefaultInitFile" value="false" /> |
| <parameter name="useShallowMemBlocks" value="false" /> |
| <parameter name="writable" value="true" /> |
| </module> |
| <module name="spi_0" kind="altera_avalon_spi" version="17.0" enabled="1"> |
| <parameter name="avalonSpec" value="2.0" /> |
| <parameter name="clockPhase" value="1" /> |
| <parameter name="clockPolarity" value="0" /> |
| <parameter name="dataWidth" value="8" /> |
| <parameter name="disableAvalonFlowControl" value="false" /> |
| <parameter name="inputClockRate" value="50000000" /> |
| <parameter name="insertDelayBetweenSlaveSelectAndSClk" value="false" /> |
| <parameter name="insertSync" value="false" /> |
| <parameter name="lsbOrderedFirst" value="false" /> |
| <parameter name="masterSPI" value="true" /> |
| <parameter name="numberOfSlaves" value="1" /> |
| <parameter name="syncRegDepth" value="2" /> |
| <parameter name="targetClockRate" value="128000" /> |
| <parameter name="targetSlaveSelectToSClkDelay" value="0.0" /> |
| </module> |
| <module |
| name="sysid" |
| kind="altera_avalon_sysid_qsys" |
| version="17.0" |
| enabled="1"> |
| <parameter name="id" value="0" /> |
| </module> |
| <module name="timer_0" kind="altera_avalon_timer" version="17.0" enabled="1"> |
| <parameter name="alwaysRun" value="false" /> |
| <parameter name="counterSize" value="32" /> |
| <parameter name="fixedPeriod" value="false" /> |
| <parameter name="period" value="1" /> |
| <parameter name="periodUnits" value="MSEC" /> |
| <parameter name="resetOutput" value="false" /> |
| <parameter name="snapshot" value="true" /> |
| <parameter name="systemFrequency" value="50000000" /> |
| <parameter name="timeoutPulseOutput" value="false" /> |
| <parameter name="watchdogPulse" value="2" /> |
| </module> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="jtag_uart_0.avalon_jtag_slave"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00201000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="a_16550_uart_0.avalon_slave"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00100000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="ext_flash.avl_csr"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00100240" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="ext_flash.avl_mem"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x08000000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="sysid.control_slave"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00100300" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="msgdma_0.csr"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x001002c0" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="i2c_0.csr"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00100200" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="onchip_flash_0.csr"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00200000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="onchip_flash_0.data"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x0000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="nios2_gen2_0.debug_mem_slave"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00200800" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="msgdma_0.descriptor_slave"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x001002f0" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="onchip_memory2_0.s1"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00400000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="timer_0.s1"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x001002a0" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="led.s1"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x001002e0" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.data_master" |
| end="spi_0.spi_control_port"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00100280" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.instruction_master" |
| end="ext_flash.avl_mem"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x08000000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.instruction_master" |
| end="onchip_flash_0.data"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x0000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.instruction_master" |
| end="nios2_gen2_0.debug_mem_slave"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00200800" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="nios2_gen2_0.instruction_master" |
| end="onchip_memory2_0.s1"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00400000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="msgdma_0.mm_read" |
| end="onchip_memory2_0.s1"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00400000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="avalon" |
| version="17.0" |
| start="msgdma_0.mm_write" |
| end="onchip_memory2_0.s1"> |
| <parameter name="arbitrationPriority" value="1" /> |
| <parameter name="baseAddress" value="0x00400000" /> |
| <parameter name="defaultConnection" value="false" /> |
| </connection> |
| <connection |
| kind="clock" |
| version="17.0" |
| start="altpll_0.c0" |
| end="ext_flash.clock_sink" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="nios2_gen2_0.clk" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="jtag_uart_0.clk" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="timer_0.clk" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="spi_0.clk" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="led.clk" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="sysid.clk" /> |
| <connection |
| kind="clock" |
| version="17.0" |
| start="clk_0.clk" |
| end="onchip_flash_0.clk" /> |
| <connection |
| kind="clock" |
| version="17.0" |
| start="clk_0.clk" |
| end="onchip_memory2_0.clk1" /> |
| <connection |
| kind="clock" |
| version="17.0" |
| start="clk_0.clk" |
| end="a_16550_uart_0.clock" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="msgdma_0.clock" /> |
| <connection kind="clock" version="17.0" start="clk_0.clk" end="i2c_0.clock" /> |
| <connection |
| kind="clock" |
| version="17.0" |
| start="clk_0.clk" |
| end="altpll_0.inclk_interface" /> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="msgdma_0.csr_irq"> |
| <parameter name="irqNumber" value="3" /> |
| </connection> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="i2c_0.interrupt_sender"> |
| <parameter name="irqNumber" value="4" /> |
| </connection> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="ext_flash.interrupt_sender"> |
| <parameter name="irqNumber" value="6" /> |
| </connection> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="jtag_uart_0.irq"> |
| <parameter name="irqNumber" value="0" /> |
| </connection> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="timer_0.irq"> |
| <parameter name="irqNumber" value="2" /> |
| </connection> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="spi_0.irq"> |
| <parameter name="irqNumber" value="5" /> |
| </connection> |
| <connection |
| kind="interrupt" |
| version="17.0" |
| start="nios2_gen2_0.irq" |
| end="a_16550_uart_0.irq_sender"> |
| <parameter name="irqNumber" value="1" /> |
| </connection> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="altpll_0.inclk_interface_reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="onchip_flash_0.nreset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="nios2_gen2_0.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="jtag_uart_0.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="timer_0.reset" /> |
| <connection kind="reset" version="17.0" start="clk_0.clk_reset" end="spi_0.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="ext_flash.reset" /> |
| <connection kind="reset" version="17.0" start="clk_0.clk_reset" end="led.reset" /> |
| <connection kind="reset" version="17.0" start="clk_0.clk_reset" end="sysid.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="onchip_memory2_0.reset1" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="msgdma_0.reset_n" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="a_16550_uart_0.reset_sink" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="clk_0.clk_reset" |
| end="i2c_0.reset_sink" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="nios2_gen2_0.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="jtag_uart_0.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="spi_0.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="ext_flash.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="led.reset" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="onchip_memory2_0.reset1" /> |
| <connection |
| kind="reset" |
| version="17.0" |
| start="nios2_gen2_0.debug_reset_request" |
| end="msgdma_0.reset_n" /> |
| <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" /> |
| <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" /> |
| <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" /> |
| <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" /> |
| </system> |
