| /* |
| * Copyright (c) 2018, Cypress |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <arm/armv6-m.dtsi> |
| #include <cypress/psoc6.dtsi> |
| |
| / { |
| cpus { |
| cpu@0 { |
| compatible = "arm,cortex-m0+"; |
| }; |
| |
| /delete-node/ cpu@1; |
| }; |
| |
| soc { |
| intmux: intmux@40210020 { |
| /* see cypress,psoc6-int-mux.yaml */ |
| compatible = "cypress,psoc6-intmux"; |
| reg = <0x40210020 0x20>; |
| ranges = <0x0 0x40210020 0x20>; |
| status = "okay"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| intmux_ch0: interrupt-controller@0 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x0 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <0 3>; |
| status = "okay"; |
| }; |
| intmux_ch1: interrupt-controller@1 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <1 3>; |
| status = "okay"; |
| }; |
| intmux_ch2: interrupt-controller@2 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x2 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <2 3>; |
| status = "okay"; |
| }; |
| intmux_ch3: interrupt-controller@3 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x3 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <3 3>; |
| status = "okay"; |
| }; |
| intmux_ch4: interrupt-controller@4 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x4 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <4 3>; |
| status = "okay"; |
| }; |
| intmux_ch5: interrupt-controller@5 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x5 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <5 3>; |
| status = "okay"; |
| }; |
| intmux_ch6: interrupt-controller@6 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x6 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <6 3>; |
| status = "okay"; |
| }; |
| intmux_ch7: interrupt-controller@7 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x7 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <7 3>; |
| status = "okay"; |
| }; |
| intmux_ch8: interrupt-controller@8 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x8 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <8 3>; |
| status = "okay"; |
| }; |
| intmux_ch9: interrupt-controller@9 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x9 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <9 3>; |
| status = "okay"; |
| }; |
| intmux_ch10: interrupt-controller@a { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0xa 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <10 3>; |
| status = "okay"; |
| }; |
| intmux_ch11: interrupt-controller@b { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0xb 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <11 3>; |
| status = "okay"; |
| }; |
| intmux_ch12: interrupt-controller@c { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0xc 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <12 3>; |
| status = "okay"; |
| }; |
| intmux_ch13: interrupt-controller@d { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0xd 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <13 3>; |
| status = "okay"; |
| }; |
| intmux_ch14: interrupt-controller@e { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0xe 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <14 3>; |
| status = "okay"; |
| }; |
| intmux_ch15: interrupt-controller@f { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0xf 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <15 3>; |
| status = "okay"; |
| }; |
| intmux_ch16: interrupt-controller@10 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x10 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <16 3>; |
| status = "okay"; |
| }; |
| intmux_ch17: interrupt-controller@11 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x11 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <17 3>; |
| status = "okay"; |
| }; |
| intmux_ch18: interrupt-controller@12 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x12 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <18 3>; |
| status = "okay"; |
| }; |
| intmux_ch19: interrupt-controller@13 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x13 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <19 3>; |
| status = "okay"; |
| }; |
| intmux_ch20: interrupt-controller@14 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x14 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <20 3>; |
| status = "okay"; |
| }; |
| intmux_ch21: interrupt-controller@15 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x15 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <21 3>; |
| status = "okay"; |
| }; |
| intmux_ch22: interrupt-controller@16 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x16 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <22 3>; |
| status = "okay"; |
| }; |
| intmux_ch23: interrupt-controller@17 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x17 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <23 3>; |
| status = "okay"; |
| }; |
| intmux_ch24: interrupt-controller@18 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x18 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <24 3>; |
| status = "okay"; |
| }; |
| intmux_ch25: interrupt-controller@19 { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x19 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <25 3>; |
| status = "okay"; |
| }; |
| intmux_ch26: interrupt-controller@1a { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1a 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <26 3>; |
| status = "okay"; |
| }; |
| intmux_ch27: interrupt-controller@1b { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1b 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <27 3>; |
| status = "okay"; |
| }; |
| intmux_ch28: interrupt-controller@1c { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1c 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <28 3>; |
| status = "okay"; |
| }; |
| intmux_ch29: interrupt-controller@1d { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1d 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <29 3>; |
| status = "okay"; |
| }; |
| intmux_ch30: interrupt-controller@1e { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1e 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <30 3>; |
| status = "okay"; |
| }; |
| intmux_ch31: interrupt-controller@1f { |
| compatible = "cypress,psoc6-intmux-ch"; |
| reg = <0x1f 1>; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| interrupts = <31 3>; |
| status = "okay"; |
| }; |
| }; |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <2>; |
| }; |
